From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42738) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bzRBh-0002T7-Kn for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bzRBe-00055X-8c for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:25 -0400 Received: from mout.kundenserver.de ([212.227.126.133]:64448) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1bzRBe-00054n-08 for qemu-devel@nongnu.org; Wed, 26 Oct 2016 12:36:22 -0400 From: Laurent Vivier Date: Wed, 26 Oct 2016 18:35:58 +0200 Message-Id: <1477499766-11722-9-git-send-email-laurent@vivier.eu> In-Reply-To: <1477499766-11722-1-git-send-email-laurent@vivier.eu> References: <1477499766-11722-1-git-send-email-laurent@vivier.eu> Subject: [Qemu-devel] [PATCH 08/16] target-m68k: or can manage word and byte operands List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: schwab@linux-m68k.org, agraf@suse.de, Richard Henderson , gerg@uclinux.org, Laurent Vivier Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson --- target-m68k/translate.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 985bc58..41994b3 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -1989,19 +1989,21 @@ DISAS_INSN(or) TCGv dest; TCGv src; TCGv addr; + int opsize; - reg = DREG(insn, 9); + opsize = insn_opsize(insn); + reg = gen_extend(DREG(insn, 9), opsize, 0); dest = tcg_temp_new(); if (insn & 0x100) { - SRC_EA(env, src, OS_LONG, 0, &addr); + SRC_EA(env, src, opsize, 0, &addr); tcg_gen_or_i32(dest, src, reg); - DEST_EA(env, insn, OS_LONG, dest, &addr); + DEST_EA(env, insn, opsize, dest, &addr); } else { - SRC_EA(env, src, OS_LONG, 0, NULL); + SRC_EA(env, src, opsize, 0, NULL); tcg_gen_or_i32(dest, src, reg); - tcg_gen_mov_i32(reg, dest); + gen_partset_reg(opsize, DREG(insn, 9), dest); } - gen_logic_cc(s, dest, OS_LONG); + gen_logic_cc(s, dest, opsize); } DISAS_INSN(suba) -- 2.7.4