[Qemu-devel] [PATCH v3 05/15] target-sparc: Handle more twinx asis

[Richard Henderson <rth@twiddle.net>]

As used by HelenOS, presumably for ultra 2 and 3,
prior to the sun4v platform and the current twinx names.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target-sparc/translate.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 86432ac..e7e07de 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -2077,12 +2077,16 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop)
         case ASI_REAL_IO_L: /* Bypass, non-cacheable LE */
         case ASI_TWINX_REAL:   /* Real address, twinx */
         case ASI_TWINX_REAL_L: /* Real address, twinx, LE */
+        case ASI_QUAD_LDD_PHYS:
+        case ASI_QUAD_LDD_PHYS_L:
             mem_idx = MMU_PHYS_IDX;
             break;
         case ASI_N:  /* Nucleus */
         case ASI_NL: /* Nucleus LE */
         case ASI_TWINX_N:
         case ASI_TWINX_NL:
+        case ASI_NUCLEUS_QUAD_LDD:
+        case ASI_NUCLEUS_QUAD_LDD_L:
             mem_idx = MMU_NUCLEUS_IDX;
             break;
         case ASI_AIUP:  /* As if user primary */
@@ -2164,6 +2168,10 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop)
         case ASI_TWINX_PL:
         case ASI_TWINX_S:
         case ASI_TWINX_SL:
+        case ASI_QUAD_LDD_PHYS:
+        case ASI_QUAD_LDD_PHYS_L:
+        case ASI_NUCLEUS_QUAD_LDD:
+        case ASI_NUCLEUS_QUAD_LDD_L:
             type = GET_ASI_DTWINX;
             break;
         case ASI_BLK_COMMIT_P:
-- 
2.7.4