From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, clg@kaod.org, thuth@redhat.com,
lvivier@redhat.com, aik@ozlabs.ru, mark.cave-ayland@ilande.co.uk,
mdroth@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 24/73] ppc/pnv: add skeleton PowerNV platform
Date: Fri, 28 Oct 2016 12:37:25 +1100 [thread overview]
Message-ID: <1477618694-21019-25-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1477618694-21019-1-git-send-email-david@gibson.dropbear.id.au>
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
The goal is to emulate a PowerNV system at the level of the skiboot
firmware, which loads the OS and provides some runtime services. Power
Systems have a lower firmware (HostBoot) that does low level system
initialization, like DRAM training. This is beyond the scope of what
qemu will address in a PowerNV guest.
No devices yet, not even an interrupt controller. Just to get started,
some RAM to load the skiboot firmware, the kernel and initrd. The
device tree is fully created in the machine reset op.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[clg: - updated for qemu-2.7
- replaced fprintf by error_report
- used a common definition of _FDT macro
- removed VMStateDescription as migration is not yet supported
- added IBM Copyright statements
- reworked kernel_filename handling
- merged PnvSystem and sPowerNVMachineState
- removed PHANDLE_XICP
- added ppc_create_page_sizes_prop helper
- removed nmi support
- removed kvm support
- updated powernv machine to version 2.8
- removed chips and cpus, They will be provided in another patches
- added a machine reset routine to initialize the device tree (also)
- french has a squelette and english a skeleton.
- improved commit log.
- reworked prototypes parameters
- added a check on the ram size (thanks to Michael Ellerman)
- fixed chip-id cell
- changed MAX_CPUS to 2048
- simplified memory node creation to one node only
- removed machine version
- rewrote the device tree creation with the fdt "rw" routines
- s/sPowerNVMachineState/PnvMachineState/
- etc.]
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
default-configs/ppc64-softmmu.mak | 1 +
hw/ppc/Makefile.objs | 2 +
hw/ppc/pnv.c | 226 ++++++++++++++++++++++++++++++++++++++
include/hw/ppc/pnv.h | 38 +++++++
4 files changed, 267 insertions(+)
create mode 100644 hw/ppc/pnv.c
create mode 100644 include/hw/ppc/pnv.h
diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak
index db5a4d6..67a9bca 100644
--- a/default-configs/ppc64-softmmu.mak
+++ b/default-configs/ppc64-softmmu.mak
@@ -39,6 +39,7 @@ CONFIG_I8259=y
CONFIG_XILINX=y
CONFIG_XILINX_ETHLITE=y
CONFIG_PSERIES=y
+CONFIG_POWERNV=y
CONFIG_PREP=y
CONFIG_MAC=y
CONFIG_E500=y
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index 99a0d4e..8105db7 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -5,6 +5,8 @@ obj-$(CONFIG_PSERIES) += spapr.o spapr_vio.o spapr_events.o
obj-$(CONFIG_PSERIES) += spapr_hcall.o spapr_iommu.o spapr_rtas.o
obj-$(CONFIG_PSERIES) += spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o
obj-$(CONFIG_PSERIES) += spapr_cpu_core.o
+# IBM PowerNV
+obj-$(CONFIG_POWERNV) += pnv.o
ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy)
obj-y += spapr_pci_vfio.o
endif
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
new file mode 100644
index 0000000..8d98509
--- /dev/null
+++ b/hw/ppc/pnv.c
@@ -0,0 +1,226 @@
+/*
+ * QEMU PowerPC PowerNV machine model
+ *
+ * Copyright (c) 2016, IBM Corporation.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/numa.h"
+#include "hw/hw.h"
+#include "target-ppc/cpu.h"
+#include "qemu/log.h"
+#include "hw/ppc/fdt.h"
+#include "hw/ppc/ppc.h"
+#include "hw/ppc/pnv.h"
+#include "hw/loader.h"
+#include "exec/address-spaces.h"
+#include "qemu/cutils.h"
+
+#include <libfdt.h>
+
+#define FDT_MAX_SIZE 0x00100000
+
+#define FW_FILE_NAME "skiboot.lid"
+#define FW_LOAD_ADDR 0x0
+#define FW_MAX_SIZE 0x00400000
+
+#define KERNEL_LOAD_ADDR 0x20000000
+#define INITRD_LOAD_ADDR 0x40000000
+
+/*
+ * On Power Systems E880 (POWER8), the max cpus (threads) should be :
+ * 4 * 4 sockets * 12 cores * 8 threads = 1536
+ * Let's make it 2^11
+ */
+#define MAX_CPUS 2048
+
+/*
+ * Memory nodes are created by hostboot, one for each range of memory
+ * that has a different "affinity". In practice, it means one range
+ * per chip.
+ */
+static void powernv_populate_memory_node(void *fdt, int chip_id, hwaddr start,
+ hwaddr size)
+{
+ char *mem_name;
+ uint64_t mem_reg_property[2];
+ int off;
+
+ mem_reg_property[0] = cpu_to_be64(start);
+ mem_reg_property[1] = cpu_to_be64(size);
+
+ mem_name = g_strdup_printf("memory@%"HWADDR_PRIx, start);
+ off = fdt_add_subnode(fdt, 0, mem_name);
+ g_free(mem_name);
+
+ _FDT((fdt_setprop_string(fdt, off, "device_type", "memory")));
+ _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
+ sizeof(mem_reg_property))));
+ _FDT((fdt_setprop_cell(fdt, off, "ibm,chip-id", chip_id)));
+}
+
+static void *powernv_create_fdt(MachineState *machine)
+{
+ const char plat_compat[] = "qemu,powernv\0ibm,powernv";
+ PnvMachineState *pnv = POWERNV_MACHINE(machine);
+ void *fdt;
+ char *buf;
+ int off;
+
+ fdt = g_malloc0(FDT_MAX_SIZE);
+ _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE)));
+
+ /* Root node */
+ _FDT((fdt_setprop_cell(fdt, 0, "#address-cells", 0x2)));
+ _FDT((fdt_setprop_cell(fdt, 0, "#size-cells", 0x2)));
+ _FDT((fdt_setprop_string(fdt, 0, "model",
+ "IBM PowerNV (emulated by qemu)")));
+ _FDT((fdt_setprop(fdt, 0, "compatible", plat_compat,
+ sizeof(plat_compat))));
+
+ buf = qemu_uuid_unparse_strdup(&qemu_uuid);
+ _FDT((fdt_setprop_string(fdt, 0, "vm,uuid", buf)));
+ if (qemu_uuid_set) {
+ _FDT((fdt_property_string(fdt, "system-id", buf)));
+ }
+ g_free(buf);
+
+ off = fdt_add_subnode(fdt, 0, "chosen");
+ if (machine->kernel_cmdline) {
+ _FDT((fdt_setprop_string(fdt, off, "bootargs",
+ machine->kernel_cmdline)));
+ }
+
+ if (pnv->initrd_size) {
+ uint32_t start_prop = cpu_to_be32(pnv->initrd_base);
+ uint32_t end_prop = cpu_to_be32(pnv->initrd_base + pnv->initrd_size);
+
+ _FDT((fdt_setprop(fdt, off, "linux,initrd-start",
+ &start_prop, sizeof(start_prop))));
+ _FDT((fdt_setprop(fdt, off, "linux,initrd-end",
+ &end_prop, sizeof(end_prop))));
+ }
+
+ /* TODO: put all the memory in one node on chip 0 until we find a
+ * way to specify different ranges for each chip
+ */
+ powernv_populate_memory_node(fdt, 0, 0, machine->ram_size);
+
+ return fdt;
+}
+
+static void ppc_powernv_reset(void)
+{
+ MachineState *machine = MACHINE(qdev_get_machine());
+ void *fdt;
+
+ qemu_devices_reset();
+
+ fdt = powernv_create_fdt(machine);
+
+ /* Pack resulting tree */
+ _FDT((fdt_pack(fdt)));
+
+ cpu_physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt));
+}
+
+static void ppc_powernv_init(MachineState *machine)
+{
+ PnvMachineState *pnv = POWERNV_MACHINE(machine);
+ MemoryRegion *ram;
+ char *fw_filename;
+ long fw_size;
+
+ /* allocate RAM */
+ if (machine->ram_size < (1 * G_BYTE)) {
+ error_report("Warning: skiboot may not work with < 1GB of RAM");
+ }
+
+ ram = g_new(MemoryRegion, 1);
+ memory_region_allocate_system_memory(ram, NULL, "ppc_powernv.ram",
+ machine->ram_size);
+ memory_region_add_subregion(get_system_memory(), 0, ram);
+
+ /* load skiboot firmware */
+ if (bios_name == NULL) {
+ bios_name = FW_FILE_NAME;
+ }
+
+ fw_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+
+ fw_size = load_image_targphys(fw_filename, FW_LOAD_ADDR, FW_MAX_SIZE);
+ if (fw_size < 0) {
+ hw_error("qemu: could not load OPAL '%s'\n", fw_filename);
+ exit(1);
+ }
+ g_free(fw_filename);
+
+ /* load kernel */
+ if (machine->kernel_filename) {
+ long kernel_size;
+
+ kernel_size = load_image_targphys(machine->kernel_filename,
+ KERNEL_LOAD_ADDR, 0x2000000);
+ if (kernel_size < 0) {
+ hw_error("qemu: could not load kernel'%s'\n",
+ machine->kernel_filename);
+ exit(1);
+ }
+ }
+
+ /* load initrd */
+ if (machine->initrd_filename) {
+ pnv->initrd_base = INITRD_LOAD_ADDR;
+ pnv->initrd_size = load_image_targphys(machine->initrd_filename,
+ pnv->initrd_base, 0x10000000); /* 128MB max */
+ if (pnv->initrd_size < 0) {
+ error_report("qemu: could not load initial ram disk '%s'",
+ machine->initrd_filename);
+ exit(1);
+ }
+ }
+}
+
+static void powernv_machine_class_init(ObjectClass *oc, void *data)
+{
+ MachineClass *mc = MACHINE_CLASS(oc);
+
+ mc->desc = "IBM PowerNV (Non-Virtualized)";
+ mc->init = ppc_powernv_init;
+ mc->reset = ppc_powernv_reset;
+ mc->max_cpus = MAX_CPUS;
+ mc->block_default_type = IF_IDE; /* Pnv provides a AHCI device for
+ * storage */
+ mc->no_parallel = 1;
+ mc->default_boot_order = NULL;
+ mc->default_ram_size = 1 * G_BYTE;
+}
+
+static const TypeInfo powernv_machine_info = {
+ .name = TYPE_POWERNV_MACHINE,
+ .parent = TYPE_MACHINE,
+ .instance_size = sizeof(PnvMachineState),
+ .class_init = powernv_machine_class_init,
+};
+
+static void powernv_machine_register_types(void)
+{
+ type_register_static(&powernv_machine_info);
+}
+
+type_init(powernv_machine_register_types)
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
new file mode 100644
index 0000000..474fe9c
--- /dev/null
+++ b/include/hw/ppc/pnv.h
@@ -0,0 +1,38 @@
+/*
+ * QEMU PowerPC PowerNV various definitions
+ *
+ * Copyright (c) 2014-2016 BenH, IBM Corporation.
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef _PPC_PNV_H
+#define _PPC_PNV_H
+
+#include "hw/boards.h"
+
+#define TYPE_POWERNV_MACHINE MACHINE_TYPE_NAME("powernv")
+#define POWERNV_MACHINE(obj) \
+ OBJECT_CHECK(PnvMachineState, (obj), TYPE_POWERNV_MACHINE)
+
+typedef struct PnvMachineState {
+ /*< private >*/
+ MachineState parent_obj;
+
+ uint32_t initrd_base;
+ long initrd_size;
+} PnvMachineState;
+
+#define PNV_FDT_ADDR 0x01000000
+
+#endif /* _PPC_PNV_H */
--
2.7.4
next prev parent reply other threads:[~2016-10-28 1:39 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-28 1:37 [Qemu-devel] [PULL 00/73] ppc-for-2.8 queue 20161028 David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 01/73] pseries: Update SLOF firmware image to 20161019 David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 02/73] ppc/xics: Add xics to the monitor "info pic" command David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 03/73] tests: fix memory leak in virtio-scsi-test David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 04/73] tests: don't check if qtest_spapr_boot() returns NULL David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 05/73] tests: move QVirtioBus pointer into QVirtioDevice David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 06/73] tests: rename target_big_endian() as qvirtio_is_big_endian() David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 07/73] tests: use qtest_pc_boot()/qtest_shutdown() in virtio tests David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 08/73] tests: enable virtio tests on SPAPR David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 09/73] spapr_pci: advertise explicit numa IDs even when there's 1 node David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 10/73] nvram: Introduce helper functions for CHRP "system" and "free space" partitions David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 11/73] sparc: Use the new common NVRAM functions for system and free space partition David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 12/73] nvram: Move the remaining CHRP NVRAM related code to chrp_nvram.[ch] David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 13/73] nvram: Rename openbios_firmware_abi.h into sun_nvram.h David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 14/73] target-ppc: implement vnegw/d instructions David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 15/73] target-ppc: implement xxbr[qdwh] instruction David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 16/73] ppc/xics: add a xics_set_nr_servers common routine David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 17/73] ppc/xics: add a XICSState backlink in ICPState David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 18/73] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 19/73] ppc: fix MSR_ME handling for system reset interrupt David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 20/73] pseries: Remove unused callbacks from sPAPR VIO bus state David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 21/73] ppc: Fix single step with gdb stub David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 22/73] ppc: add skiboot firmware for the pnv platform David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 23/73] configure, ppc64: Copy skiboot.lid to build directory when configuring David Gibson
2016-10-28 1:37 ` David Gibson [this message]
2016-10-28 1:37 ` [Qemu-devel] [PULL 25/73] ppc/pnv: add a PnvChip object David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 26/73] ppc/pnv: add a core mask to PnvChip David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 27/73] ppc/pnv: add a PIR handler " David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 28/73] ppc/pnv: add a PnvCore object David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 29/73] ppc/pnv: add XSCOM infrastructure David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 30/73] ppc/pnv: add XSCOM handlers to PnvCore David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 31/73] ppc/pnv: add a LPC controller David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 32/73] ppc/pnv: add a ISA bus David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 33/73] target-ppc: add vmul10[u, eu, cu, ecu]q instructions David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 34/73] pseries: Split device tree construction from device tree load David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 35/73] pseries: Remove rtas_addr and fdt_addr fields from machinestate David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 36/73] pseries: Make spapr_create_fdt_skel() get information from machine state David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 37/73] pseries: Move adding of fdt reserve map entries David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 38/73] pseries: Consolidate RTAS loading David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 39/73] pseries: Move construction of /interrupt-controller fdt node David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 40/73] pseries: Consolidate construction of /chosen device tree node David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 41/73] pseries: Consolidate construction of /rtas " David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 42/73] pseries: Move /event-sources construction to spapr_build_fdt() David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 43/73] pseries: Move /hypervisor node construction to fdt_build_fdt() David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 44/73] pseries: Consolidate construction of /vdevice device tree node David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 45/73] pseries: Remove spapr_create_fdt_skel() David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 46/73] spapr_ovec: initial implementation of option vector helpers David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 47/73] spapr_hcall: use spapr_ovec_* interfaces for CAS options David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 48/73] spapr: add option vector handling in CAS-generated resets David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 49/73] spapr: improve ibm, architecture-vec-5 property handling David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 50/73] adb: change handler only when recognized David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 51/73] libqos: Give qvirtio_config_read*() consistent semantics David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 52/73] libqos: Handle PCI IO de-multiplexing in common code David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 53/73] libqos: Move BAR assignment to " David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 54/73] libqos: Better handling of PCI legacy IO David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 55/73] tests: Adjust tco-test to use qpci_legacy_iomap() David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 56/73] libqos: Add streaming accessors for PCI MMIO David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 57/73] libqos: Implement mmio accessors in terms of mem{read, write} David Gibson
2016-10-28 1:37 ` [Qemu-devel] [PULL 58/73] tests: Clean up IO handling in ide-test David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 59/73] libqos: Add 64-bit PCI IO accessors David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 60/73] tests: Use qpci_mem{read, write} in ivshmem-test David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 61/73] tests: Don't assume structure of PCI IO base in ahci-test David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 62/73] libqos: Change PCI accessors to take opaque BAR handle David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 63/73] spapr_nvram: Pre-initialize the NVRAM to support the -prom-env parameter David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 64/73] tests: Add pseries machine to the prom-env-test, too David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 65/73] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instructions David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 67/73] spapr: update spapr hotplug documentation David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 68/73] spapr_events: add support for dedicated hotplug event source David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 69/73] spapr: add hotplug interrupt machine options David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 70/73] spapr: Add DRC count indexed hotplug identifier type David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 71/73] spapr: use count+index for memory hotplug David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 72/73] spapr: Memory hot-unplug support David Gibson
2016-10-28 1:38 ` [Qemu-devel] [PULL 73/73] ppc: allow certain HV interrupts to be delivered to guests David Gibson
2016-10-28 16:22 ` [Qemu-devel] [PULL 00/73] ppc-for-2.8 queue 20161028 Peter Maydell
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