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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: agraf@suse.de, clg@kaod.org, thuth@redhat.com,
	lvivier@redhat.com, aik@ozlabs.ru, mark.cave-ayland@ilande.co.uk,
	mdroth@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 59/73] libqos: Add 64-bit PCI IO accessors
Date: Fri, 28 Oct 2016 12:38:00 +1100	[thread overview]
Message-ID: <1477618694-21019-60-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1477618694-21019-1-git-send-email-david@gibson.dropbear.id.au>

Currently the libqos PCI layer includes accessor helpers for 8, 16 and 32
bit reads and writes.  It's likely that we'll want 64-bit accesses in the
future (plenty of modern peripherals will have 64-bit reigsters).  This
adds them.

For PIO (not MMIO) accesses on the PC backend, this is implemented as two
32-bit ins or outs.  That's not ideal but AFAICT x86 doesn't have 64-bit
versions of in and out.

This patch also converts the single current user of 64-bit accesses -
virtio-pci.c to use the new mechanism, rather than a sequence of 8 byte
reads.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
---
 tests/libqos/pci-pc.c     | 13 +++++++++++++
 tests/libqos/pci-spapr.c  | 14 ++++++++++++++
 tests/libqos/pci.c        | 25 +++++++++++++++++++++++++
 tests/libqos/pci.h        |  4 ++++
 tests/libqos/virtio-pci.c | 16 ++++------------
 5 files changed, 60 insertions(+), 12 deletions(-)

diff --git a/tests/libqos/pci-pc.c b/tests/libqos/pci-pc.c
index 849ea56..ded1c54 100644
--- a/tests/libqos/pci-pc.c
+++ b/tests/libqos/pci-pc.c
@@ -57,6 +57,17 @@ static void qpci_pc_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)
     outl(addr, val);
 }
 
+static uint64_t qpci_pc_pio_readq(QPCIBus *bus, uint32_t addr)
+{
+    return (uint64_t)inl(addr) + ((uint64_t)inl(addr + 4) << 32);
+}
+
+static void qpci_pc_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)
+{
+    outl(addr, val & 0xffffffff);
+    outl(addr + 4, val >> 32);
+}
+
 static void qpci_pc_memread(QPCIBus *bus, uint32_t addr, void *buf, size_t len)
 {
     memread(addr, buf, len);
@@ -113,10 +124,12 @@ QPCIBus *qpci_init_pc(QGuestAllocator *alloc)
     ret->bus.pio_readb = qpci_pc_pio_readb;
     ret->bus.pio_readw = qpci_pc_pio_readw;
     ret->bus.pio_readl = qpci_pc_pio_readl;
+    ret->bus.pio_readq = qpci_pc_pio_readq;
 
     ret->bus.pio_writeb = qpci_pc_pio_writeb;
     ret->bus.pio_writew = qpci_pc_pio_writew;
     ret->bus.pio_writel = qpci_pc_pio_writel;
+    ret->bus.pio_writeq = qpci_pc_pio_writeq;
 
     ret->bus.memread = qpci_pc_memread;
     ret->bus.memwrite = qpci_pc_memwrite;
diff --git a/tests/libqos/pci-spapr.c b/tests/libqos/pci-spapr.c
index f26488a..1e5d015 100644
--- a/tests/libqos/pci-spapr.c
+++ b/tests/libqos/pci-spapr.c
@@ -78,6 +78,18 @@ static void qpci_spapr_pio_writel(QPCIBus *bus, uint32_t addr, uint32_t val)
     writel(s->pio_cpu_base + addr, bswap32(val));
 }
 
+static uint64_t qpci_spapr_pio_readq(QPCIBus *bus, uint32_t addr)
+{
+    QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
+    return bswap64(readq(s->pio_cpu_base + addr));
+}
+
+static void qpci_spapr_pio_writeq(QPCIBus *bus, uint32_t addr, uint64_t val)
+{
+    QPCIBusSPAPR *s = container_of(bus, QPCIBusSPAPR, bus);
+    writeq(s->pio_cpu_base + addr, bswap64(val));
+}
+
 static void qpci_spapr_memread(QPCIBus *bus, uint32_t addr,
                                void *buf, size_t len)
 {
@@ -153,10 +165,12 @@ QPCIBus *qpci_init_spapr(QGuestAllocator *alloc)
     ret->bus.pio_readb = qpci_spapr_pio_readb;
     ret->bus.pio_readw = qpci_spapr_pio_readw;
     ret->bus.pio_readl = qpci_spapr_pio_readl;
+    ret->bus.pio_readq = qpci_spapr_pio_readq;
 
     ret->bus.pio_writeb = qpci_spapr_pio_writeb;
     ret->bus.pio_writew = qpci_spapr_pio_writew;
     ret->bus.pio_writel = qpci_spapr_pio_writel;
+    ret->bus.pio_writeq = qpci_spapr_pio_writeq;
 
     ret->bus.memread = qpci_spapr_memread;
     ret->bus.memwrite = qpci_spapr_memwrite;
diff --git a/tests/libqos/pci.c b/tests/libqos/pci.c
index bdffeb3..3021651 100644
--- a/tests/libqos/pci.c
+++ b/tests/libqos/pci.c
@@ -262,6 +262,19 @@ uint32_t qpci_io_readl(QPCIDevice *dev, void *data)
     }
 }
 
+uint64_t qpci_io_readq(QPCIDevice *dev, void *data)
+{
+    uintptr_t addr = (uintptr_t)data;
+
+    if (addr < QPCI_PIO_LIMIT) {
+        return dev->bus->pio_readq(dev->bus, addr);
+    } else {
+        uint64_t val;
+        dev->bus->memread(dev->bus, addr, &val, sizeof(val));
+        return le64_to_cpu(val);
+    }
+}
+
 void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value)
 {
     uintptr_t addr = (uintptr_t)data;
@@ -297,6 +310,18 @@ void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value)
     }
 }
 
+void qpci_io_writeq(QPCIDevice *dev, void *data, uint64_t value)
+{
+    uintptr_t addr = (uintptr_t)data;
+
+    if (addr < QPCI_PIO_LIMIT) {
+        dev->bus->pio_writeq(dev->bus, addr, value);
+    } else {
+        value = cpu_to_le64(value);
+        dev->bus->memwrite(dev->bus, addr, &value, sizeof(value));
+    }
+}
+
 void qpci_memread(QPCIDevice *dev, void *data, void *buf, size_t len)
 {
     uintptr_t addr = (uintptr_t)data;
diff --git a/tests/libqos/pci.h b/tests/libqos/pci.h
index ce6ed08..531e3f7 100644
--- a/tests/libqos/pci.h
+++ b/tests/libqos/pci.h
@@ -26,10 +26,12 @@ struct QPCIBus {
     uint8_t (*pio_readb)(QPCIBus *bus, uint32_t addr);
     uint16_t (*pio_readw)(QPCIBus *bus, uint32_t addr);
     uint32_t (*pio_readl)(QPCIBus *bus, uint32_t addr);
+    uint64_t (*pio_readq)(QPCIBus *bus, uint32_t addr);
 
     void (*pio_writeb)(QPCIBus *bus, uint32_t addr, uint8_t value);
     void (*pio_writew)(QPCIBus *bus, uint32_t addr, uint16_t value);
     void (*pio_writel)(QPCIBus *bus, uint32_t addr, uint32_t value);
+    void (*pio_writeq)(QPCIBus *bus, uint32_t addr, uint64_t value);
 
     void (*memread)(QPCIBus *bus, uint32_t addr, void *buf, size_t len);
     void (*memwrite)(QPCIBus *bus, uint32_t addr, const void *buf, size_t len);
@@ -82,10 +84,12 @@ void qpci_config_writel(QPCIDevice *dev, uint8_t offset, uint32_t value);
 uint8_t qpci_io_readb(QPCIDevice *dev, void *data);
 uint16_t qpci_io_readw(QPCIDevice *dev, void *data);
 uint32_t qpci_io_readl(QPCIDevice *dev, void *data);
+uint64_t qpci_io_readq(QPCIDevice *dev, void *data);
 
 void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value);
 void qpci_io_writew(QPCIDevice *dev, void *data, uint16_t value);
 void qpci_io_writel(QPCIDevice *dev, void *data, uint32_t value);
+void qpci_io_writeq(QPCIDevice *dev, void *data, uint64_t value);
 
 void qpci_memread(QPCIDevice *bus, void *data, void *buf, size_t len);
 void qpci_memwrite(QPCIDevice *bus, void *data, const void *buf, size_t len);
diff --git a/tests/libqos/virtio-pci.c b/tests/libqos/virtio-pci.c
index fa82132..c69d09d 100644
--- a/tests/libqos/virtio-pci.c
+++ b/tests/libqos/virtio-pci.c
@@ -106,22 +106,14 @@ static uint32_t qvirtio_pci_config_readl(QVirtioDevice *d, uint64_t off)
 static uint64_t qvirtio_pci_config_readq(QVirtioDevice *d, uint64_t off)
 {
     QVirtioPCIDevice *dev = (QVirtioPCIDevice *)d;
-    int i;
-    uint64_t u64 = 0;
+    uint64_t val;
 
+    val = qpci_io_readq(dev->pdev, CONFIG_BASE(dev) + off);
     if (qvirtio_is_big_endian(d)) {
-        for (i = 0; i < 8; ++i) {
-            u64 |= (uint64_t)qpci_io_readb(dev->pdev, CONFIG_BASE(dev)
-                                           + off + i) << (7 - i) * 8;
-        }
-    } else {
-        for (i = 0; i < 8; ++i) {
-            u64 |= (uint64_t)qpci_io_readb(dev->pdev, CONFIG_BASE(dev)
-                                           + off + i) << i * 8;
-        }
+        val = bswap64(val);
     }
 
-    return u64;
+    return val;
 }
 
 static uint32_t qvirtio_pci_get_features(QVirtioDevice *d)
-- 
2.7.4

  parent reply	other threads:[~2016-10-28  1:42 UTC|newest]

Thread overview: 75+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-10-28  1:37 [Qemu-devel] [PULL 00/73] ppc-for-2.8 queue 20161028 David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 01/73] pseries: Update SLOF firmware image to 20161019 David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 02/73] ppc/xics: Add xics to the monitor "info pic" command David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 03/73] tests: fix memory leak in virtio-scsi-test David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 04/73] tests: don't check if qtest_spapr_boot() returns NULL David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 05/73] tests: move QVirtioBus pointer into QVirtioDevice David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 06/73] tests: rename target_big_endian() as qvirtio_is_big_endian() David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 07/73] tests: use qtest_pc_boot()/qtest_shutdown() in virtio tests David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 08/73] tests: enable virtio tests on SPAPR David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 09/73] spapr_pci: advertise explicit numa IDs even when there's 1 node David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 10/73] nvram: Introduce helper functions for CHRP "system" and "free space" partitions David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 11/73] sparc: Use the new common NVRAM functions for system and free space partition David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 12/73] nvram: Move the remaining CHRP NVRAM related code to chrp_nvram.[ch] David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 13/73] nvram: Rename openbios_firmware_abi.h into sun_nvram.h David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 14/73] target-ppc: implement vnegw/d instructions David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 15/73] target-ppc: implement xxbr[qdwh] instruction David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 16/73] ppc/xics: add a xics_set_nr_servers common routine David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 17/73] ppc/xics: add a XICSState backlink in ICPState David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 18/73] ppc/xics: change the icp_ routines API to use an 'ICPState *' argument David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 19/73] ppc: fix MSR_ME handling for system reset interrupt David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 20/73] pseries: Remove unused callbacks from sPAPR VIO bus state David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 21/73] ppc: Fix single step with gdb stub David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 22/73] ppc: add skiboot firmware for the pnv platform David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 23/73] configure, ppc64: Copy skiboot.lid to build directory when configuring David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 24/73] ppc/pnv: add skeleton PowerNV platform David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 25/73] ppc/pnv: add a PnvChip object David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 26/73] ppc/pnv: add a core mask to PnvChip David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 27/73] ppc/pnv: add a PIR handler " David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 28/73] ppc/pnv: add a PnvCore object David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 29/73] ppc/pnv: add XSCOM infrastructure David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 30/73] ppc/pnv: add XSCOM handlers to PnvCore David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 31/73] ppc/pnv: add a LPC controller David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 32/73] ppc/pnv: add a ISA bus David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 33/73] target-ppc: add vmul10[u, eu, cu, ecu]q instructions David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 34/73] pseries: Split device tree construction from device tree load David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 35/73] pseries: Remove rtas_addr and fdt_addr fields from machinestate David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 36/73] pseries: Make spapr_create_fdt_skel() get information from machine state David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 37/73] pseries: Move adding of fdt reserve map entries David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 38/73] pseries: Consolidate RTAS loading David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 39/73] pseries: Move construction of /interrupt-controller fdt node David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 40/73] pseries: Consolidate construction of /chosen device tree node David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 41/73] pseries: Consolidate construction of /rtas " David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 42/73] pseries: Move /event-sources construction to spapr_build_fdt() David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 43/73] pseries: Move /hypervisor node construction to fdt_build_fdt() David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 44/73] pseries: Consolidate construction of /vdevice device tree node David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 45/73] pseries: Remove spapr_create_fdt_skel() David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 46/73] spapr_ovec: initial implementation of option vector helpers David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 47/73] spapr_hcall: use spapr_ovec_* interfaces for CAS options David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 48/73] spapr: add option vector handling in CAS-generated resets David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 49/73] spapr: improve ibm, architecture-vec-5 property handling David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 50/73] adb: change handler only when recognized David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 51/73] libqos: Give qvirtio_config_read*() consistent semantics David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 52/73] libqos: Handle PCI IO de-multiplexing in common code David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 53/73] libqos: Move BAR assignment to " David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 54/73] libqos: Better handling of PCI legacy IO David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 55/73] tests: Adjust tco-test to use qpci_legacy_iomap() David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 56/73] libqos: Add streaming accessors for PCI MMIO David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 57/73] libqos: Implement mmio accessors in terms of mem{read, write} David Gibson
2016-10-28  1:37 ` [Qemu-devel] [PULL 58/73] tests: Clean up IO handling in ide-test David Gibson
2016-10-28  1:38 ` David Gibson [this message]
2016-10-28  1:38 ` [Qemu-devel] [PULL 60/73] tests: Use qpci_mem{read, write} in ivshmem-test David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 61/73] tests: Don't assume structure of PCI IO base in ahci-test David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 62/73] libqos: Change PCI accessors to take opaque BAR handle David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 63/73] spapr_nvram: Pre-initialize the NVRAM to support the -prom-env parameter David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 64/73] tests: Add pseries machine to the prom-env-test, too David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 65/73] target-ppc: add xscmp[eq, gt, ge, ne]dp instructions David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 66/73] target-ppc: Add xvcmpnesp, xvcmpnedp instructions David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 67/73] spapr: update spapr hotplug documentation David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 68/73] spapr_events: add support for dedicated hotplug event source David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 69/73] spapr: add hotplug interrupt machine options David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 70/73] spapr: Add DRC count indexed hotplug identifier type David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 71/73] spapr: use count+index for memory hotplug David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 72/73] spapr: Memory hot-unplug support David Gibson
2016-10-28  1:38 ` [Qemu-devel] [PULL 73/73] ppc: allow certain HV interrupts to be delivered to guests David Gibson
2016-10-28 16:22 ` [Qemu-devel] [PULL 00/73] ppc-for-2.8 queue 20161028 Peter Maydell

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