From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: schwab@linux-m68k.org, agraf@suse.de,
Richard Henderson <rth@twiddle.net>,
gerg@uclinux.org, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PULL 01/18] target-m68k: add bkpt instruction
Date: Fri, 28 Oct 2016 10:48:15 +0200 [thread overview]
Message-ID: <1477644512-21716-2-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1477644512-21716-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target-m68k/translate.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index 6c6173a..a128b67 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1639,6 +1639,11 @@ DISAS_INSN(swap)
gen_logic_cc(s, reg, OS_LONG);
}
+DISAS_INSN(bkpt)
+{
+ gen_exception(s, s->pc - 2, EXCP_DEBUG);
+}
+
DISAS_INSN(pea)
{
TCGv tmp;
@@ -3056,6 +3061,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(move_to_sr, 46c0, ffc0, CF_ISA_A);
BASE(pea, 4840, ffc0);
BASE(swap, 4840, fff8);
+ INSN(bkpt, 4848, fff8, BKPT);
BASE(movem, 48c0, fbc0);
BASE(ext, 4880, fff8);
BASE(ext, 48c0, fff8);
--
2.7.4
next prev parent reply other threads:[~2016-10-28 8:49 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-28 8:48 [Qemu-devel] [PULL 00/18] M68k part2 patches Laurent Vivier
2016-10-28 8:48 ` Laurent Vivier [this message]
2016-10-28 8:48 ` [Qemu-devel] [PULL 02/18] target-m68k: add linkl Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 03/18] target-m68k: add exg ops Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 04/18] target-m68k: add addressing modes to scc Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 05/18] target-m68k: add dbcc Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 06/18] target-m68k: Inline addx, subx, negx Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 07/18] target-m68k: add addressing modes to not Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 08/18] target-m68k: eor can manage word and byte operands Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 09/18] target-m68k: or " Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 10/18] target-m68k: and " Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 11/18] target-m68k: suba/adda can manage word operand Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 12/18] target-m68k: some bit ops cleanup Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 13/18] target-m68k: introduce byte and word cc_ops Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 14/18] target-m68k: add addressing modes to neg Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 15/18] target-m68k: add/sub manage word and byte operands Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 16/18] target-m68k: cmp manages word and bytes operands Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 17/18] target-m68k: immediate ops manage word and byte operands Laurent Vivier
2016-10-28 8:48 ` [Qemu-devel] [PULL 18/18] MAINTAINERS: update M68K entry Laurent Vivier
2016-10-28 16:57 ` [Qemu-devel] [PULL 00/18] M68k part2 patches Peter Maydell
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