[Qemu-devel] [PATCH v3 0/2] 680x0 mul and div instructions

[Laurent Vivier <laurent@vivier.eu>]

This series is another subset of the series I sent in May:
https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg00501.html

It must be applied on top of series:
"target-m68k: 680x0 instruction set, part 2"

This subset contains reworked patches of mul and div instructions:
- "add 64bit mull": correctly set QREG_CC_V,
- "inline divu/divs": don't inline divu/divs, but update
   existing functions to manage 680x0 div instructions

I've checked it doesn't break coldfire support:
http://wiki.qemu.org/download/coldfire-test-0.1.tar.bz2
but it can't boot a 680x0 processor kernel.

v3:
- mull: manage the case where Dl == Dh
- divu/divs: move all the mechanic to helpers,
  and pass the register number to directly set
  the result
v2:
- Free "rem" and "quot" in "divl".

Laurent Vivier (2):
  target-m68k: add 64bit mull
  target-m68k: add 680x0 divu/divs variants

 linux-user/main.c       |   7 ++
 target-m68k/cpu.h       |   4 --
 target-m68k/helper.h    |   8 ++-
 target-m68k/op_helper.c | 182 +++++++++++++++++++++++++++++++++++++++++-------
 target-m68k/qregs.def   |   2 -
 target-m68k/translate.c | 146 +++++++++++++++++++++++++-------------
 6 files changed, 267 insertions(+), 82 deletions(-)

-- 
2.7.4