From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52602) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c1XrK-0007oA-BO for qemu-devel@nongnu.org; Tue, 01 Nov 2016 08:08:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c1XrH-0007k8-P2 for qemu-devel@nongnu.org; Tue, 01 Nov 2016 08:08:06 -0400 Received: from mail-oi0-x243.google.com ([2607:f8b0:4003:c06::243]:35242) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c1XrH-0007jr-Kb for qemu-devel@nongnu.org; Tue, 01 Nov 2016 08:08:03 -0400 Received: by mail-oi0-x243.google.com with SMTP id v84so10414210oie.2 for ; Tue, 01 Nov 2016 05:08:03 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Tue, 1 Nov 2016 06:07:50 -0600 Message-Id: <1478002070-26676-10-git-send-email-rth@twiddle.net> In-Reply-To: <1478002070-26676-1-git-send-email-rth@twiddle.net> References: <1478002070-26676-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL v2 for-2.8 9/9] tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Joseph Myers From: Joseph Myers The version of tcg_gen_ld8s_i64 for 32-bit systems does a load into the low part of the return value - then attempts a sign extension into the high part, but wrongly sets the high part to a sign extension of itself rather than of the low part. This results in TCG internal errors from the use of the uninitialized high part (in some GCC tests of AArch64 NEON shift intrinsics, in particular). This patch corrects the sign-extension logic, making it match other functions such as tcg_gen_ld16s_i64. Reviewed-by: Peter Maydell Signed-off-by: Joseph Myers Message-Id: Signed-off-by: Richard Henderson --- tcg/tcg-op.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 4d125df..6e2fb35 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -817,7 +817,7 @@ void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) { tcg_gen_ld8s_i32(TCGV_LOW(ret), arg2, offset); - tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), 31); + tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_LOW(ret), 31); } void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset) -- 2.7.4