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From: Richard Henderson <rth@twiddle.net>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL v2 for-2.8 8/9] tcg/tcg.h: Improve documentation of TCGv_i32 etc types
Date: Tue,  1 Nov 2016 06:07:49 -0600	[thread overview]
Message-ID: <1478002070-26676-9-git-send-email-rth@twiddle.net> (raw)
In-Reply-To: <1478002070-26676-1-git-send-email-rth@twiddle.net>

From: Peter Maydell <peter.maydell@linaro.org>

The typedefs we use for the TCGv_i32, TCGv_i64 and TCGv_ptr
types are somewhat confusing, because we define them as
pointers to structs, but the structs themselves are never
defined. Explain in the comments a bit more clearly why
this is OK and what is going on under the hood.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <1477067922-26202-1-git-send-email-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 tcg/tcg.h | 38 ++++++++++++++++++++++++++++++--------
 1 file changed, 30 insertions(+), 8 deletions(-)

diff --git a/tcg/tcg.h b/tcg/tcg.h
index dc1281f..a35e4c4 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -376,14 +376,36 @@ static inline unsigned get_alignment_bits(TCGMemOp memop)
 
 typedef tcg_target_ulong TCGArg;
 
-/* Define a type and accessor macros for variables.  Using pointer types
-   is nice because it gives some level of type safely.  Converting to and
-   from intptr_t rather than int reduces the number of sign-extension
-   instructions that get implied on 64-bit hosts.  Users of tcg_gen_* don't
-   need to know about any of this, and should treat TCGv as an opaque type.
-   In addition we do typechecking for different types of variables.  TCGv_i32
-   and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
-   are aliases for target_ulong and host pointer sized values respectively.  */
+/* Define type and accessor macros for TCG variables.
+
+   TCG variables are the inputs and outputs of TCG ops, as described
+   in tcg/README. Target CPU front-end code uses these types to deal
+   with TCG variables as it emits TCG code via the tcg_gen_* functions.
+   They come in several flavours:
+    * TCGv_i32 : 32 bit integer type
+    * TCGv_i64 : 64 bit integer type
+    * TCGv_ptr : a host pointer type
+    * TCGv : an integer type the same size as target_ulong
+             (an alias for either TCGv_i32 or TCGv_i64)
+   The compiler's type checking will complain if you mix them
+   up and pass the wrong sized TCGv to a function.
+
+   Users of tcg_gen_* don't need to know about any of the internal
+   details of these, and should treat them as opaque types.
+   You won't be able to look inside them in a debugger either.
+
+   Internal implementation details follow:
+
+   Note that there is no definition of the structs TCGv_i32_d etc anywhere.
+   This is deliberate, because the values we store in variables of type
+   TCGv_i32 are not really pointers-to-structures. They're just small
+   integers, but keeping them in pointer types like this means that the
+   compiler will complain if you accidentally pass a TCGv_i32 to a
+   function which takes a TCGv_i64, and so on. Only the internals of
+   TCG need to care about the actual contents of the types, and they always
+   box and unbox via the MAKE_TCGV_* and GET_TCGV_* functions.
+   Converting to and from intptr_t rather than int reduces the number
+   of sign-extension instructions that get implied on 64-bit hosts.  */
 
 typedef struct TCGv_i32_d *TCGv_i32;
 typedef struct TCGv_i64_d *TCGv_i64;
-- 
2.7.4

  parent reply	other threads:[~2016-11-01 12:08 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-01 12:07 [Qemu-devel] [PULL v2 for-2.8 0/9] tcg queued patches Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 1/9] target-cris: Do not dump cpu state with -d in_asm Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 2/9] target-microblaze: " Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 3/9] target-openrisc: " Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 4/9] log: Add locking to large logging blocks Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 5/9] tcg: Add tcg_gen_mulsu2_{i32, i64, tl} Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 6/9] target-microblaze: Cleanup dec_mul Richard Henderson
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 7/9] MAINTAINERS: Update PPC status and maintainer Richard Henderson
2016-11-01 12:07 ` Richard Henderson [this message]
2016-11-01 12:07 ` [Qemu-devel] [PULL v2 for-2.8 9/9] tcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension Richard Henderson
2016-11-01 14:26 ` [Qemu-devel] [PULL v2 for-2.8 0/9] tcg queued patches Peter Maydell
2016-11-01 16:38   ` Richard Henderson
2016-11-01 15:34 ` Richard Henderson
2016-11-01 15:54   ` Peter Maydell
2016-11-01 16:20   ` Daniel P. Berrange
2016-11-01 16:26     ` Peter Maydell
2016-11-01 17:43       ` Daniel P. Berrange
2016-11-01 17:51         ` Richard Henderson
2016-11-01 18:17           ` Peter Maydell
2016-11-01 19:21             ` Richard Henderson
2016-11-01 21:08               ` Peter Maydell

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