From: Brijesh Singh <brijesh.singh@amd.com>
To: Thomas.Lendacky@amd.com, ehabkost@redhat.com,
crosthwaite.peter@gmail.com, armbru@redhat.com, mst@redhat.com,
p.fedin@samsung.com, qemu-devel@nongnu.org,
lcapitulino@redhat.com, pbonzini@redhat.com, rth@twiddle.net
Cc: brijesh.ksingh@gmail.com
Subject: [Qemu-devel] [RFC PATCH v3 04/18] monitor: use debug version of memory access apis
Date: Tue, 1 Nov 2016 11:52:27 -0400 [thread overview]
Message-ID: <147801554779.18237.4534364473067017190.stgit@brijesh-build-machine> (raw)
In-Reply-To: <147801550845.18237.12915616525154608660.stgit@brijesh-build-machine>
updates hmp monitor to use debug version of memory access apis when
accessing the guest memory.
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
---
cpus.c | 2 +-
disas.c | 2 +-
monitor.c | 2 +-
target-i386/helper.c | 14 +++++++-------
target-i386/monitor.c | 47 +++++++++++++++++++++++++++++------------------
5 files changed, 39 insertions(+), 28 deletions(-)
diff --git a/cpus.c b/cpus.c
index 5213351..bf9836a 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1654,7 +1654,7 @@ void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
l = sizeof(buf);
if (l > size)
l = size;
- cpu_physical_memory_read(addr, buf, l);
+ cpu_physical_memory_read_debug(addr, buf, l);
if (fwrite(buf, 1, l, f) != l) {
error_setg(errp, QERR_IO_ERROR);
goto exit;
diff --git a/disas.c b/disas.c
index 67f116a..8861441 100644
--- a/disas.c
+++ b/disas.c
@@ -354,7 +354,7 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
CPUDebug *s = container_of(info, CPUDebug, info);
if (monitor_disas_is_physical) {
- cpu_physical_memory_read(memaddr, myaddr, length);
+ cpu_physical_memory_read_debug(memaddr, myaddr, length);
} else {
cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
}
diff --git a/monitor.c b/monitor.c
index 7b963ad..1378491 100644
--- a/monitor.c
+++ b/monitor.c
@@ -1301,7 +1301,7 @@ static void memory_dump(Monitor *mon, int count, int format, int wsize,
if (l > line_size)
l = line_size;
if (is_physical) {
- cpu_physical_memory_read(addr, buf, l);
+ cpu_physical_memory_read_debug(addr, buf, l);
} else {
if (cpu_memory_rw_debug(mon_get_cpu(), addr, buf, l, 0) < 0) {
monitor_printf(mon, " Cannot access memory\n");
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 4ecc091..e707350 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1034,13 +1034,13 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
}
pml4e_addr = ((env->cr[3] & ~0xfff) + (((addr >> 39) & 0x1ff) << 3)) &
env->a20_mask;
- pml4e = x86_ldq_phys(cs, pml4e_addr);
+ pml4e = ldq_phys_debug(cs, pml4e_addr);
if (!(pml4e & PG_PRESENT_MASK)) {
return -1;
}
pdpe_addr = ((pml4e & PG_ADDRESS_MASK) +
(((addr >> 30) & 0x1ff) << 3)) & env->a20_mask;
- pdpe = x86_ldq_phys(cs, pdpe_addr);
+ pdpe = ldq_phys_debug(cs, pdpe_addr);
if (!(pdpe & PG_PRESENT_MASK)) {
return -1;
}
@@ -1055,14 +1055,14 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
{
pdpe_addr = ((env->cr[3] & ~0x1f) + ((addr >> 27) & 0x18)) &
env->a20_mask;
- pdpe = x86_ldq_phys(cs, pdpe_addr);
+ pdpe = ldq_phys_debug(cs, pdpe_addr);
if (!(pdpe & PG_PRESENT_MASK))
return -1;
}
pde_addr = ((pdpe & PG_ADDRESS_MASK) +
(((addr >> 21) & 0x1ff) << 3)) & env->a20_mask;
- pde = x86_ldq_phys(cs, pde_addr);
+ pde = ldq_phys_debug(cs, pde_addr);
if (!(pde & PG_PRESENT_MASK)) {
return -1;
}
@@ -1075,7 +1075,7 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
pte_addr = ((pde & PG_ADDRESS_MASK) +
(((addr >> 12) & 0x1ff) << 3)) & env->a20_mask;
page_size = 4096;
- pte = x86_ldq_phys(cs, pte_addr);
+ pte = ldq_phys_debug(cs, pte_addr);
}
if (!(pte & PG_PRESENT_MASK)) {
return -1;
@@ -1085,7 +1085,7 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
/* page directory entry */
pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask;
- pde = x86_ldl_phys(cs, pde_addr);
+ pde = ldl_phys_debug(cs, pde_addr);
if (!(pde & PG_PRESENT_MASK))
return -1;
if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
@@ -1094,7 +1094,7 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
} else {
/* page directory entry */
pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
- pte = x86_ldl_phys(cs, pte_addr);
+ pte = ldl_phys_debug(cs, pte_addr);
if (!(pte & PG_PRESENT_MASK)) {
return -1;
}
diff --git a/target-i386/monitor.c b/target-i386/monitor.c
index 9a3b4d7..2d125c5 100644
--- a/target-i386/monitor.c
+++ b/target-i386/monitor.c
@@ -122,20 +122,22 @@ static void tlb_info_pae32(Monitor *mon, CPUArchState *env)
}
#ifdef TARGET_X86_64
-static void tlb_info_64(Monitor *mon, CPUArchState *env)
+static void tlb_info_64(Monitor *mon, CPUState *cs)
{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUArchState *env = &cpu->env;
uint64_t l1, l2, l3, l4;
uint64_t pml4e, pdpe, pde, pte;
uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr;
pml4_addr = env->cr[3] & 0x3fffffffff000ULL;
for (l1 = 0; l1 < 512; l1++) {
- cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8);
+ pml4e = ldq_phys_debug(cs, pml4_addr + l1 * 8);
pml4e = le64_to_cpu(pml4e);
if (pml4e & PG_PRESENT_MASK) {
pdp_addr = pml4e & 0x3fffffffff000ULL;
for (l2 = 0; l2 < 512; l2++) {
- cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8);
+ pdpe = ldq_phys_debug(cs, pdp_addr + l2 * 8);
pdpe = le64_to_cpu(pdpe);
if (pdpe & PG_PRESENT_MASK) {
if (pdpe & PG_PSE_MASK) {
@@ -145,7 +147,7 @@ static void tlb_info_64(Monitor *mon, CPUArchState *env)
} else {
pd_addr = pdpe & 0x3fffffffff000ULL;
for (l3 = 0; l3 < 512; l3++) {
- cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8);
+ pde = ldq_phys_debug(cs, pd_addr + l3 * 8);
pde = le64_to_cpu(pde);
if (pde & PG_PRESENT_MASK) {
if (pde & PG_PSE_MASK) {
@@ -156,9 +158,8 @@ static void tlb_info_64(Monitor *mon, CPUArchState *env)
} else {
pt_addr = pde & 0x3fffffffff000ULL;
for (l4 = 0; l4 < 512; l4++) {
- cpu_physical_memory_read(pt_addr
- + l4 * 8,
- &pte, 8);
+ pte = ldq_phys_debug(cs,
+ pt_addr + l4 * 8);
pte = le64_to_cpu(pte);
if (pte & PG_PRESENT_MASK) {
print_pte(mon, (l1 << 39) +
@@ -181,9 +182,14 @@ static void tlb_info_64(Monitor *mon, CPUArchState *env)
void hmp_info_tlb(Monitor *mon, const QDict *qdict)
{
+ X86CPU *cpu;
+ CPUState *cs;
CPUArchState *env;
- env = mon_get_cpu_env();
+ cs = mon_get_cpu();
+ cpu = X86_CPU(cs);
+ env = &cpu->env;
+
if (!(env->cr[0] & CR0_PG_MASK)) {
monitor_printf(mon, "PG disabled\n");
@@ -192,7 +198,7 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)
if (env->cr[4] & CR4_PAE_MASK) {
#ifdef TARGET_X86_64
if (env->hflags & HF_LMA_MASK) {
- tlb_info_64(mon, env);
+ tlb_info_64(mon, cs);
} else
#endif
{
@@ -324,10 +330,12 @@ static void mem_info_pae32(Monitor *mon, CPUArchState *env)
#ifdef TARGET_X86_64
-static void mem_info_64(Monitor *mon, CPUArchState *env)
+static void mem_info_64(Monitor *mon, CPUState *cs)
{
int prot, last_prot;
uint64_t l1, l2, l3, l4;
+ X86CPU *cpu = X86_CPU(cs);
+ CPUArchState *env = &cpu->env;
uint64_t pml4e, pdpe, pde, pte;
uint64_t pml4_addr, pdp_addr, pd_addr, pt_addr, start, end;
@@ -335,13 +343,13 @@ static void mem_info_64(Monitor *mon, CPUArchState *env)
last_prot = 0;
start = -1;
for (l1 = 0; l1 < 512; l1++) {
- cpu_physical_memory_read(pml4_addr + l1 * 8, &pml4e, 8);
+ pml4e = ldq_phys_debug(cs, pml4_addr + l1 * 8);
pml4e = le64_to_cpu(pml4e);
end = l1 << 39;
if (pml4e & PG_PRESENT_MASK) {
pdp_addr = pml4e & 0x3fffffffff000ULL;
for (l2 = 0; l2 < 512; l2++) {
- cpu_physical_memory_read(pdp_addr + l2 * 8, &pdpe, 8);
+ pdpe = ldq_phys_debug(cs, pdp_addr + l2 * 8);
pdpe = le64_to_cpu(pdpe);
end = (l1 << 39) + (l2 << 30);
if (pdpe & PG_PRESENT_MASK) {
@@ -353,7 +361,7 @@ static void mem_info_64(Monitor *mon, CPUArchState *env)
} else {
pd_addr = pdpe & 0x3fffffffff000ULL;
for (l3 = 0; l3 < 512; l3++) {
- cpu_physical_memory_read(pd_addr + l3 * 8, &pde, 8);
+ pde = ldq_phys_debug(cs, pd_addr + l3 * 8);
pde = le64_to_cpu(pde);
end = (l1 << 39) + (l2 << 30) + (l3 << 21);
if (pde & PG_PRESENT_MASK) {
@@ -365,9 +373,8 @@ static void mem_info_64(Monitor *mon, CPUArchState *env)
} else {
pt_addr = pde & 0x3fffffffff000ULL;
for (l4 = 0; l4 < 512; l4++) {
- cpu_physical_memory_read(pt_addr
- + l4 * 8,
- &pte, 8);
+ pte = ldq_phys_debug(cs,
+ pt_addr + l4 * 8);
pte = le64_to_cpu(pte);
end = (l1 << 39) + (l2 << 30) +
(l3 << 21) + (l4 << 12);
@@ -404,9 +411,13 @@ static void mem_info_64(Monitor *mon, CPUArchState *env)
void hmp_info_mem(Monitor *mon, const QDict *qdict)
{
+ X86CPU *cpu;
+ CPUState *cs;
CPUArchState *env;
- env = mon_get_cpu_env();
+ cs = mon_get_cpu();
+ cpu = X86_CPU(cs);
+ env = &cpu->env;
if (!(env->cr[0] & CR0_PG_MASK)) {
monitor_printf(mon, "PG disabled\n");
@@ -415,7 +426,7 @@ void hmp_info_mem(Monitor *mon, const QDict *qdict)
if (env->cr[4] & CR4_PAE_MASK) {
#ifdef TARGET_X86_64
if (env->hflags & HF_LMA_MASK) {
- mem_info_64(mon, env);
+ mem_info_64(mon, cs);
} else
#endif
{
next prev parent reply other threads:[~2016-11-01 15:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-01 15:51 [Qemu-devel] [RFC PATCH v3 00/18] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2016-11-01 15:51 ` [Qemu-devel] [RFC PATCH v3 01/18] memattrs: add debug attrs Brijesh Singh
2016-11-01 15:52 ` [Qemu-devel] [RFC PATCH v3 02/18] exec: add guest RAM read and write ops Brijesh Singh
2016-11-01 15:52 ` [Qemu-devel] [RFC PATCH v3 03/18] exec: add debug version of physical memory read and write apis Brijesh Singh
2016-11-01 15:52 ` Brijesh Singh [this message]
2016-11-01 15:52 ` [Qemu-devel] [RFC PATCH v3 05/18] core: add new security-policy object Brijesh Singh
2016-11-01 15:52 ` [Qemu-devel] [RFC PATCH v3 06/18] kvm: add memory encryption APIs Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 07/18] sev: add Secure Encrypted Virtulization (SEV) support Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 08/18] hmp: display memory encryption support in 'info kvm' Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 09/18] core: loader: create memory encryption context before copying data Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 10/18] sev: add LAUNCH_START command Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 11/18] sev: add LAUNCH_UPDATE command Brijesh Singh
2016-11-01 15:53 ` [Qemu-devel] [RFC PATCH v3 12/18] sev: add LAUNCH_FINISH command Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 13/18] sev: add DEBUG_DECRYPT command Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 14/18] sev: add DEBUG_ENCRYPT command Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 15/18] i386: register memory encryption ops Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 16/18] target-i386: add cpuid Fn8000_001f Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 17/18] i386: clear C-bit in SEV guest page table walk Brijesh Singh
2016-11-01 15:54 ` [Qemu-devel] [RFC PATCH v3 18/18] migration: disable save/restore and migration on SEV guest Brijesh Singh
2016-11-01 16:22 ` [Qemu-devel] [RFC PATCH v3 00/18] x86: Secure Encrypted Virtualization (AMD) no-reply
2016-11-01 16:31 ` Peter Maydell
2016-11-01 16:24 ` no-reply
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