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From: Chao Peng <chao.p.peng@linux.intel.com>
To: qemu-devel@nongnu.org
Cc: "Michael S. Tsirkin" <mst@redhat.com>,
	Richard Henderson <rth@twiddle.net>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Eduardo Habkost <ehabkost@redhat.com>
Subject: [Qemu-devel] [PATCH 2/4] pc: make sata configurable
Date: Sat,  5 Nov 2016 03:19:49 -0400	[thread overview]
Message-ID: <1478330391-74060-3-git-send-email-chao.p.peng@linux.intel.com> (raw)
In-Reply-To: <1478330391-74060-1-git-send-email-chao.p.peng@linux.intel.com>

Signed-off-by: Chao Peng <chao.p.peng@linux.intel.com>
---
 hw/i386/pc.c         | 29 ++++++++++++++++++++++++-----
 hw/i386/pc_q35.c     | 24 ++++++++++++++----------
 include/hw/i386/pc.h |  2 ++
 3 files changed, 40 insertions(+), 15 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 95d68d5..c5c65ce 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -400,13 +400,13 @@ static void pc_cmos_init_late(void *opaque)
     int i, trans;
 
     val = 0;
-    if (ide_get_geometry(arg->idebus[0], 0,
-                         &cylinders, &heads, &sectors) >= 0) {
+    if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 0,
+                                           &cylinders, &heads, &sectors) >= 0) {
         cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
         val |= 0xf0;
     }
-    if (ide_get_geometry(arg->idebus[0], 1,
-                         &cylinders, &heads, &sectors) >= 0) {
+    if (arg->idebus[0] && ide_get_geometry(arg->idebus[0], 1,
+                                           &cylinders, &heads, &sectors) >= 0) {
         cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
         val |= 0x0f;
     }
@@ -418,7 +418,8 @@ static void pc_cmos_init_late(void *opaque)
            geometry.  It is always such that: 1 <= sects <= 63, 1
            <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
            geometry can be different if a translation is done. */
-        if (ide_get_geometry(arg->idebus[i / 2], i % 2,
+        if (arg->idebus[i / 2] &&
+            ide_get_geometry(arg->idebus[i / 2], i % 2,
                              &cylinders, &heads, &sectors) >= 0) {
             trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
             assert((trans & ~3) == 0);
@@ -2194,6 +2195,20 @@ static void pc_machine_set_smbus(Object *obj, bool value, Error **errp)
     pcms->smbus = value;
 }
 
+static bool pc_machine_get_sata(Object *obj, Error **errp)
+{
+    PCMachineState *pcms = PC_MACHINE(obj);
+
+    return pcms->sata;
+}
+
+static void pc_machine_set_sata(Object *obj, bool value, Error **errp)
+{
+    PCMachineState *pcms = PC_MACHINE(obj);
+
+    pcms->sata = value;
+}
+
 static void pc_machine_initfn(Object *obj)
 {
     PCMachineState *pcms = PC_MACHINE(obj);
@@ -2204,6 +2219,7 @@ static void pc_machine_initfn(Object *obj)
     /* nvdimm is disabled on default. */
     pcms->acpi_nvdimm_state.is_enabled = false;
     pcms->smbus = true;
+    pcms->sata = true;
 }
 
 static void pc_machine_reset(void)
@@ -2368,6 +2384,9 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)
 
     object_class_property_add_bool(oc, PC_MACHINE_SMBUS,
         pc_machine_get_smbus, pc_machine_set_smbus, &error_abort);
+
+    object_class_property_add_bool(oc, PC_MACHINE_SATA,
+        pc_machine_get_sata, pc_machine_set_sata, &error_abort);
 }
 
 static const TypeInfo pc_machine_info = {
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 5efc65a..205c33e 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -232,16 +232,20 @@ static void pc_q35_init(MachineState *machine)
     /* connect pm stuff to lpc */
     ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
 
-    /* ahci and SATA device, for q35 1 ahci controller is built-in */
-    ahci = pci_create_simple_multifunction(host_bus,
-                                           PCI_DEVFN(ICH9_SATA1_DEV,
-                                                     ICH9_SATA1_FUNC),
-                                           true, "ich9-ahci");
-    idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
-    idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
-    g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
-    ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
-    ahci_ide_create_devs(ahci, hd);
+    if (pcms->sata) {
+        /* ahci and SATA device, for q35 1 ahci controller is built-in */
+        ahci = pci_create_simple_multifunction(host_bus,
+                                               PCI_DEVFN(ICH9_SATA1_DEV,
+                                                         ICH9_SATA1_FUNC),
+                                               true, "ich9-ahci");
+        idebus[0] = qdev_get_child_bus(&ahci->qdev, "ide.0");
+        idebus[1] = qdev_get_child_bus(&ahci->qdev, "ide.1");
+        g_assert(MAX_SATA_PORTS == ICH_AHCI(ahci)->ahci.ports);
+        ide_drive_get(hd, ICH_AHCI(ahci)->ahci.ports);
+        ahci_ide_create_devs(ahci, hd);
+    } else {
+        idebus[0] = idebus[1] = NULL;
+    }
 
     if (machine_usb(machine)) {
         /* Should we create 6 UHCI according to ich9 spec? */
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index dfa1129..d7dfda6 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -63,6 +63,7 @@ struct PCMachineState {
     AcpiNVDIMMState acpi_nvdimm_state;
 
     bool smbus;
+    bool sata;
 
     /* RAM information (sizes, addresses, configuration): */
     ram_addr_t below_4g_mem_size, above_4g_mem_size;
@@ -89,6 +90,7 @@ struct PCMachineState {
 #define PC_MACHINE_SMM              "smm"
 #define PC_MACHINE_NVDIMM           "nvdimm"
 #define PC_MACHINE_SMBUS            "smbus"
+#define PC_MACHINE_SATA             "sata"
 
 /**
  * PCMachineClass:
-- 
1.8.3.1

  parent reply	other threads:[~2016-11-05  7:28 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-11-05  7:19 [Qemu-devel] [PATCH 0/4] make SMBUS/SATA/PIT configurable and introduce Chao Peng
2016-11-05  7:19 ` [Qemu-devel] [PATCH 1/4] pc: make smbus configurable Chao Peng
2016-11-05  7:19 ` Chao Peng [this message]
2016-11-05  7:19 ` [Qemu-devel] [PATCH 3/4] pc: make pit configurable Chao Peng
2016-11-05  7:19 ` [Qemu-devel] [PATCH 4/4] q35: introduce q35-lite Chao Peng
2016-11-06  7:06   ` Michael S. Tsirkin
2016-11-07 17:09     ` Paolo Bonzini
2016-11-14  8:06       ` Chao Peng
2016-11-14 20:51         ` Michael S. Tsirkin
2016-12-14 16:58           ` Paolo Bonzini
2016-11-10 14:50 ` [Qemu-devel] [PATCH 0/4] make SMBUS/SATA/PIT configurable and introduce Michael S. Tsirkin
2016-11-14  7:41   ` Chao Peng

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