From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c3H0j-0003pv-6S for qemu-devel@nongnu.org; Sun, 06 Nov 2016 01:32:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c3H0f-0006eE-9q for qemu-devel@nongnu.org; Sun, 06 Nov 2016 01:32:57 -0500 Received: from mail-pf0-x241.google.com ([2607:f8b0:400e:c00::241]:36375) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c3H0f-0006di-3P for qemu-devel@nongnu.org; Sun, 06 Nov 2016 01:32:53 -0500 Received: by mail-pf0-x241.google.com with SMTP id n85so12606708pfi.3 for ; Sat, 05 Nov 2016 23:32:52 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Sat, 5 Nov 2016 23:18:38 -0700 Message-Id: <1478413123-4575-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 0/5] target-m68k patches List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: laurent@vivier.eu I believe the first two patches have already been posted. No changes there, but included here for completeness. Next is a proposed shift patch, with the changes I believe I mentioned wanting during review. Finally, implementations of the bitfield instructions. At least the register portion depends on the generic tcg (s)extract primitives that I have queued for 2.9. The full tree is at git://github.com/rth7680/qemu.git tgt-m68k r~ Laurent Vivier (1): target-m68k: implement 680x0 movem Richard Henderson (4): target-m68k: Do not cpu_abort on undefined insns target-m68k: Inline shifts target-m68k: Implement bitfield ops for registers target-m68k: Implement bitfield ops for memory target-m68k/cpu.h | 1 + target-m68k/helper.c | 235 ++++++++++++---- target-m68k/helper.h | 10 +- target-m68k/translate.c | 702 ++++++++++++++++++++++++++++++++++++++++++++---- 4 files changed, 840 insertions(+), 108 deletions(-) -- 2.7.4