From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45698) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c3R2w-0006qV-6m for qemu-devel@nongnu.org; Sun, 06 Nov 2016 12:15:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c3R2s-0001u7-W5 for qemu-devel@nongnu.org; Sun, 06 Nov 2016 12:15:54 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:59425) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c3R2s-0001tJ-Nd for qemu-devel@nongnu.org; Sun, 06 Nov 2016 12:15:50 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uA6HDfwp029170 for ; Sun, 6 Nov 2016 12:15:49 -0500 Received: from e24smtp01.br.ibm.com (e24smtp01.br.ibm.com [32.104.18.85]) by mx0a-001b2d01.pphosted.com with ESMTP id 26hby2fucw-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Sun, 06 Nov 2016 12:15:49 -0500 Received: from localhost by e24smtp01.br.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Sun, 6 Nov 2016 15:15:47 -0200 Received: from d24relay03.br.ibm.com (d24relay03.br.ibm.com [9.18.232.225]) by d24dlp01.br.ibm.com (Postfix) with ESMTP id C26FE352006C for ; Sun, 6 Nov 2016 12:15:15 -0500 (EST) Received: from d24av05.br.ibm.com (d24av05.br.ibm.com [9.18.232.44]) by d24relay03.br.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id uA6HFhpZ39780540 for ; Sun, 6 Nov 2016 15:15:43 -0200 Received: from d24av05.br.ibm.com (localhost [127.0.0.1]) by d24av05.br.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id uA6HFhMS003082 for ; Sun, 6 Nov 2016 15:15:43 -0200 From: Jose Ricardo Ziviani Date: Sun, 6 Nov 2016 15:15:24 -0200 In-Reply-To: <1478452528-13684-1-git-send-email-joserz@linux.vnet.ibm.com> References: <1478452528-13684-1-git-send-email-joserz@linux.vnet.ibm.com> Message-Id: <1478452528-13684-6-git-send-email-joserz@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH Risu v2 5/9] Implement basic test code for PPC64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org This commit implements in assembly code a small test case to test risu without a risugen binary file. It simply store values into general registers and compare them. Signed-off-by: Jose Ricardo Ziviani --- test_ppc64le.s | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 test_ppc64le.s diff --git a/test_ppc64le.s b/test_ppc64le.s new file mode 100644 index 0000000..4321751 --- /dev/null +++ b/test_ppc64le.s @@ -0,0 +1,51 @@ +/***************************************************************************** + * Copyright (c) IBM Corp, 2016 + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * which accompanies this distribution, and is available at + * http://www.eclipse.org/legal/epl-v10.html + * + * Contributors: + * Jose Ricardo Ziviani - ppc64le implementation + * based on Claudio Fontana + * based on test_arm.s by Peter Maydell + *****************************************************************************/ + +/* Initialise the gp regs */ +li 0,0 +li 1,1 +li 2,2 +li 3,3 +li 4,4 +li 5,5 +li 6,6 +li 7,7 +li 8,8 +li 9,9 +li 10, 10 +li 11, 11 +li 12, 12 +li 13, 13 +li 14, 14 +li 15, 15 +li 16, 16 +li 17, 17 +li 18, 18 +li 19, 19 +li 20, 20 +li 21, 21 +li 22, 22 +li 23, 23 +li 24, 24 +li 25, 25 +li 26, 26 +li 27, 27 +li 28, 28 +li 29, 29 +li 30, 30 +li 31, 31 + +/* do compare */ +.int 0x00005af0 +/* exit test */ +.int 0x00005af1 -- 2.7.4