From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35050) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c3hSr-0007EW-27 for qemu-devel@nongnu.org; Mon, 07 Nov 2016 05:47:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c3hSq-0004k0-9h for qemu-devel@nongnu.org; Mon, 07 Nov 2016 05:47:45 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:47500) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1c3hSq-0004hx-33 for qemu-devel@nongnu.org; Mon, 07 Nov 2016 05:47:44 -0500 From: Peter Maydell Date: Mon, 7 Nov 2016 10:47:32 +0000 Message-Id: <1478515653-6361-4-git-send-email-peter.maydell@linaro.org> In-Reply-To: <1478515653-6361-1-git-send-email-peter.maydell@linaro.org> References: <1478515653-6361-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PULL 3/4] Fix corruption of CPSR when SCTLR.EE is set List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Stefan Hajnoczi From: Julian Brown Fix a typo in arm_cpu_do_interrupt_aarch32 (OR'ing with ~CPSR_E instead of CPSR_E) which meant that when we took an interrupt with SCTLR.EE set we would corrupt the CPSR. Signed-off-by: Julian Brown Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target-arm/helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 25b15dc..b5b65ca 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6438,7 +6438,7 @@ static void arm_cpu_do_interrupt_aarch32(CPUState *cs) /* Set new mode endianness */ env->uncached_cpsr &= ~CPSR_E; if (env->cp15.sctlr_el[arm_current_el(env)] & SCTLR_EE) { - env->uncached_cpsr |= ~CPSR_E; + env->uncached_cpsr |= CPSR_E; } env->daif |= mask; /* this is a lie, as the was no c1_sys on V4T/V5, but who cares -- 2.7.4