From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41045) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c4Cu1-0001ky-Ep for qemu-devel@nongnu.org; Tue, 08 Nov 2016 15:21:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c4Cu0-0004lY-Jb for qemu-devel@nongnu.org; Tue, 08 Nov 2016 15:21:53 -0500 From: Andrew Jones Date: Tue, 8 Nov 2016 21:21:30 +0100 Message-Id: <1478636499-14339-3-git-send-email-drjones@redhat.com> In-Reply-To: <1478636499-14339-1-git-send-email-drjones@redhat.com> References: <1478636499-14339-1-git-send-email-drjones@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [kvm-unit-tests PATCH v4 02/11] arm64: fix get_"sysreg32" and make MPIDR 64bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: pbonzini@redhat.com, andre.przywara@arm.com, peter.maydell@linaro.org, alex.bennee@linaro.org, marc.zyngier@arm.com, eric.auger@redhat.com, christoffer.dall@linaro.org, Andrew Jones mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Eric Auger Signed-off-by: Andrew Jones --- lib/arm64/asm/processor.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/lib/arm64/asm/processor.h b/lib/arm64/asm/processor.h index 84d5c7ce752b..9a208ff729b7 100644 --- a/lib/arm64/asm/processor.h +++ b/lib/arm64/asm/processor.h @@ -66,14 +66,17 @@ static inline unsigned long current_level(void) return el & 0xc; } =20 -#define DEFINE_GET_SYSREG32(reg) \ -static inline unsigned int get_##reg(void) \ +#define DEFINE_GET_SYSREG(reg, type) \ +static inline type get_##reg(void) \ { \ - unsigned int reg; \ - asm volatile("mrs %0, " #reg "_el1" : "=3Dr" (reg)); \ - return reg; \ + unsigned long r; \ + asm volatile("mrs %0, " #reg "_el1" : "=3Dr" (r)); \ + return (type)r; \ } -DEFINE_GET_SYSREG32(mpidr) +#define DEFINE_GET_SYSREG32(reg) DEFINE_GET_SYSREG(reg, unsigned int) +#define DEFINE_GET_SYSREG64(reg) DEFINE_GET_SYSREG(reg, unsigned long) + +DEFINE_GET_SYSREG64(mpidr) =20 /* Only support Aff0 for now, gicv2 only */ #define mpidr_to_cpu(mpidr) ((int)((mpidr) & 0xff)) --=20 2.7.4