From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39169) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1c5Gtn-0004CL-8X for qemu-devel@nongnu.org; Fri, 11 Nov 2016 13:50:04 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1c5Gtm-0003Gt-DZ for qemu-devel@nongnu.org; Fri, 11 Nov 2016 13:50:03 -0500 Received: from mx1.redhat.com ([209.132.183.28]:44128) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1c5Gtm-0003GY-6B for qemu-devel@nongnu.org; Fri, 11 Nov 2016 13:50:02 -0500 From: John Snow Date: Fri, 11 Nov 2016 13:49:52 -0500 Message-Id: <1478890195-30841-7-git-send-email-jsnow@redhat.com> In-Reply-To: <1478890195-30841-1-git-send-email-jsnow@redhat.com> References: <1478890195-30841-1-git-send-email-jsnow@redhat.com> Subject: [Qemu-devel] [PULL 6/9] libqos/ahci: Support expected errors List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, jsnow@redhat.com Sometimes we know we'll get back an error, so let's have the test framework understand that. Signed-off-by: John Snow Message-id: 1478553214-497-4-git-send-email-jsnow@redhat.com Signed-off-by: John Snow --- tests/libqos/ahci.c | 16 ++++++++++++---- tests/libqos/ahci.h | 3 ++- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/tests/libqos/ahci.c b/tests/libqos/ahci.c index 15fa888..77f9bed 100644 --- a/tests/libqos/ahci.c +++ b/tests/libqos/ahci.c @@ -86,6 +86,7 @@ struct AHCICommand { uint8_t name; uint8_t port; uint8_t slot; + uint8_t errors; uint32_t interrupts; uint64_t xbytes; uint32_t prd_size; @@ -402,12 +403,14 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port) /** * Check a port for errors. */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port) +void ahci_port_check_error(AHCIQState *ahci, uint8_t port, + uint32_t imask, uint8_t emask) { uint32_t reg; /* The upper 9 bits of the IS register all indicate errors. */ reg = ahci_px_rreg(ahci, port, AHCI_PX_IS); + reg &= ~imask; reg >>= 23; g_assert_cmphex(reg, ==, 0); @@ -417,8 +420,13 @@ void ahci_port_check_error(AHCIQState *ahci, uint8_t port) /* The TFD also has two error sections. */ reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD); - ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR); - ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR); + if (!emask) { + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR); + } else { + ASSERT_BIT_SET(reg, AHCI_PX_TFD_STS_ERR); + } + ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR & (~emask << 8)); + ASSERT_BIT_SET(reg, AHCI_PX_TFD_ERR & (emask << 8)); } void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, @@ -1118,7 +1126,7 @@ void ahci_command_verify(AHCIQState *ahci, AHCICommand *cmd) uint8_t slot = cmd->slot; uint8_t port = cmd->port; - ahci_port_check_error(ahci, port); + ahci_port_check_error(ahci, port, cmd->interrupts, cmd->errors); ahci_port_check_interrupts(ahci, port, cmd->interrupts); ahci_port_check_nonbusy(ahci, port, slot); ahci_port_check_cmd_sanity(ahci, cmd); diff --git a/tests/libqos/ahci.h b/tests/libqos/ahci.h index f144fab..bbe04f8 100644 --- a/tests/libqos/ahci.h +++ b/tests/libqos/ahci.h @@ -576,7 +576,8 @@ void ahci_set_command_header(AHCIQState *ahci, uint8_t port, void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot); /* AHCI sanity check routines */ -void ahci_port_check_error(AHCIQState *ahci, uint8_t port); +void ahci_port_check_error(AHCIQState *ahci, uint8_t port, + uint32_t imask, uint8_t emask); void ahci_port_check_interrupts(AHCIQState *ahci, uint8_t port, uint32_t intr_mask); void ahci_port_check_nonbusy(AHCIQState *ahci, uint8_t port, uint8_t slot); -- 2.7.4