From: "Alastair D'Silva" <alastair@au1.ibm.com>
To: "Paolo Bonzini" <pbonzini@redhat.com>,
"Cédric Le Goater" <clg@kaod.org>,
qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,
Andrew Jeffery <andrew@aj.id.au>, Joel Stanley <joel@jms.id.au>
Subject: Re: [Qemu-devel] [PATCH 2/4] qtest: Support named interrupts
Date: Wed, 23 Nov 2016 10:19:50 +1100 [thread overview]
Message-ID: <1479856790.11116.111.camel@au1.ibm.com> (raw)
In-Reply-To: <6d4e34f8-4b0b-85f2-93d6-6f0b3e2e7fb3@redhat.com>
On Tue, 2016-11-22 at 23:39 +0100, Paolo Bonzini wrote:
> On 22/11/2016 23:31, Alastair D'Silva wrote:
> >
> > >
> > > >
> > > > >
> > > > > >
> > > > > > >
> > > > > > > >
> > > > > > > > + if (irq == NULL) {
> > > > > > > > + qtest_send_prefix(chr);
> > > > > > > > + qtest_send(chr, "FAIL Unknown IRQ\n");
> > > > > > > > + return;
> > > > > > > > + }
> > > > > > > > +
> > > > > > > > + qemu_set_irq(irq, level);
> > > >
> > > > This seems wrong. The IRQ should not be modifiable by the
> > > > test.
> > > >
> > > > Paolo
> > > >
> > Thanks Paolo, could you please advise as to why that is?
Could you answer this please? I would like to understand why.
> > The situation I am addressing is that I device under test that
> > changes
> > behaviour when a GPIO line is raised. Is there another way I should
> > be
> > raising that line from within qtest?
>
> What causes the GPIO line to be raised in the normal emulated case?
>
>
It would be wired to a GPIO line from the host microcontroller, under
software control.
In this test case, the device is connected to a "borrowed" board via
the command line:
snprintf(args, sizeof(args), "-display none -machine imx25-pdk "
"-device rx8900,bus=i2c.0,address=0x%x,id=%s",
RX8900_ADDR, RX8900_TEST_ID);
I couldn't see a way to wire in the the GPIO to the host via the
command line, but even if there was, manipulating it would require
manipulating the host CPU, which would broaden the scope of the test.
At the moment, the test has no dependency on/interaction with the host
CPU, it's just using it to provide an I2C bus.
--
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819
next prev parent reply other threads:[~2016-11-22 23:20 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-17 4:36 [Qemu-devel] [PATCH 0/4] Add support for the Epson RX8900 RTC to the aspeed board Alastair D'Silva
2016-11-17 4:36 ` [Qemu-devel] [PATCH 1/4] arm: Uniquely name imx25 I2C buses Alastair D'Silva
2016-11-17 7:50 ` Cédric Le Goater
2016-11-17 4:36 ` [Qemu-devel] [PATCH 2/4] qtest: Support named interrupts Alastair D'Silva
2016-11-22 17:22 ` Cédric Le Goater
2016-11-22 17:24 ` Paolo Bonzini
2016-11-22 22:31 ` Alastair D'Silva
2016-11-22 22:39 ` Paolo Bonzini
2016-11-22 23:19 ` Alastair D'Silva [this message]
2016-11-23 9:43 ` Paolo Bonzini
2016-11-23 10:05 ` [Qemu-devel] [Qemu-arm] " Edgar E. Iglesias
2016-11-23 10:34 ` Paolo Bonzini
2016-11-17 4:36 ` [Qemu-devel] [PATCH 3/4] hw/timer: Add Epson RX8900 RTC support Alastair D'Silva
2016-11-17 8:29 ` Cédric Le Goater
2016-11-18 0:19 ` Alastair D'Silva
2016-11-18 8:52 ` Cédric Le Goater
2016-11-17 4:36 ` [Qemu-devel] [PATCH 4/4] arm: Add an RX8900 RTC to the ASpeed board Alastair D'Silva
2016-11-22 16:56 ` Cédric Le Goater
2016-11-23 0:46 ` Alastair D'Silva
2016-11-23 8:48 ` Cédric Le Goater
2016-11-24 0:15 ` Andrew Jeffery
2016-11-17 15:33 ` [Qemu-devel] [PATCH 0/4] Add support for the Epson RX8900 RTC to the aspeed board no-reply
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