From: vijay.kilari@gmail.com
To: qemu-arm@nongnu.org, peter.maydell@linaro.org,
pbonzini@redhat.com, rth@twiddle.net
Cc: p.fedin@samsung.com, marc.zyngier@arm.com,
christoffer.dall@linaro.org, qemu-devel@nongnu.org,
vijay.kilari@gmail.com, Vijaya Kumar K <Vijaya.Kumar@cavium.com>
Subject: [Qemu-devel] [PATCH v6 1/4] kernel: Add definitions for GICv3 attributes
Date: Wed, 23 Nov 2016 18:09:21 +0530 [thread overview]
Message-ID: <1479904764-15532-2-git-send-email-vijay.kilari@gmail.com> (raw)
In-Reply-To: <1479904764-15532-1-git-send-email-vijay.kilari@gmail.com>
From: Vijaya Kumar K <Vijaya.Kumar@cavium.com>
This temporary patch adds kernel API definitions. Use proper header update
procedure after these features are released.
Signed-off-by: Pavel Fedin <p.fedin@samsung.com>
Signed-off-by: Vijaya Kumamr K <Vijaya.Kumar@cavium.com>
---
| 13 +++++++++++++
| 13 +++++++++++++
2 files changed, 26 insertions(+)
--git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h
index 541268c..e3dd0e1 100644
--- a/linux-headers/asm-arm/kvm.h
+++ b/linux-headers/asm-arm/kvm.h
@@ -172,10 +172,23 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
+
#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* KVM_IRQ_LINE irq field index values */
--git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h
index fd5a276..6698bdd 100644
--- a/linux-headers/asm-arm64/kvm.h
+++ b/linux-headers/asm-arm64/kvm.h
@@ -201,10 +201,23 @@ struct kvm_arch_memory_slot {
#define KVM_DEV_ARM_VGIC_GRP_CPU_REGS 2
#define KVM_DEV_ARM_VGIC_CPUID_SHIFT 32
#define KVM_DEV_ARM_VGIC_CPUID_MASK (0xffULL << KVM_DEV_ARM_VGIC_CPUID_SHIFT)
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT 32
+#define KVM_DEV_ARM_VGIC_V3_MPIDR_MASK \
+ (0xffffffffULL << KVM_DEV_ARM_VGIC_V3_MPIDR_SHIFT)
#define KVM_DEV_ARM_VGIC_OFFSET_SHIFT 0
#define KVM_DEV_ARM_VGIC_OFFSET_MASK (0xffffffffULL << KVM_DEV_ARM_VGIC_OFFSET_SHIFT)
+#define KVM_DEV_ARM_VGIC_SYSREG_INSTR_MASK (0xffff)
#define KVM_DEV_ARM_VGIC_GRP_NR_IRQS 3
#define KVM_DEV_ARM_VGIC_GRP_CTRL 4
+#define KVM_DEV_ARM_VGIC_GRP_REDIST_REGS 5
+#define KVM_DEV_ARM_VGIC_GRP_CPU_SYSREGS 6
+#define KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO 7
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT 10
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_MASK \
+ (0x3fffffULL << KVM_DEV_ARM_VGIC_LINE_LEVEL_INFO_SHIFT)
+#define KVM_DEV_ARM_VGIC_LINE_LEVEL_INTID_MASK 0x3ff
+#define VGIC_LEVEL_INFO_LINE_LEVEL 0
+
#define KVM_DEV_ARM_VGIC_CTRL_INIT 0
/* Device Control API on vcpu fd */
--
1.9.1
next parent reply other threads:[~2016-11-23 12:40 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1479904764-15532-1-git-send-email-vijay.kilari@gmail.com>
2016-11-23 12:39 ` vijay.kilari [this message]
2016-11-25 7:57 ` [Qemu-devel] [PATCH v6 1/4] kernel: Add definitions for GICv3 attributes Auger Eric
2016-11-25 8:42 ` Vijay Kilari
2016-11-25 9:42 ` Christoffer Dall
2016-11-23 12:39 ` [Qemu-devel] [PATCH v6 4/4] hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers vijay.kilari
2016-11-28 13:01 ` Peter Maydell
2016-11-28 16:01 ` Vijay Kilari
2016-11-28 16:35 ` Peter Maydell
2016-11-30 16:23 ` Vijay Kilari
2016-11-30 16:59 ` Peter Maydell
2016-12-01 10:10 ` Vijay Kilari
2016-12-07 16:05 ` Vijay Kilari
2016-11-25 9:56 ` [Qemu-devel] [PATCH v6 0/2] GICv3 live migration support Auger Eric
[not found] ` <1479904764-15532-4-git-send-email-vijay.kilari@gmail.com>
2016-11-28 11:54 ` [Qemu-devel] [PATCH v6 3/4] hw/intc/arm_gicv3_kvm: Save and Restore ICC_SRE_EL1 register Peter Maydell
2016-11-28 12:01 ` Peter Maydell
[not found] ` <1479904764-15532-3-git-send-email-vijay.kilari@gmail.com>
2016-11-28 12:00 ` [Qemu-devel] [PATCH v6 2/4] hw/intc/arm_gicv3_kvm: Implement get/put functions Peter Maydell
2016-12-19 17:18 ` Auger Eric
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