From: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org
Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au,
nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v2 2/4] target-ppc: Implement bcdctsq. instruction
Date: Wed, 23 Nov 2016 14:21:43 -0200 [thread overview]
Message-ID: <1479918105-15616-3-git-send-email-joserz@linux.vnet.ibm.com> (raw)
In-Reply-To: <1479918105-15616-1-git-send-email-joserz@linux.vnet.ibm.com>
bcdctsq.: Decimal convert to signed quadword. It is possible to
convert packed decimal values to signed quadwords.
Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 40 +++++++++++++++++++++++++++++++++++++
target-ppc/translate/vmx-impl.inc.c | 7 +++++++
3 files changed, 48 insertions(+)
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 87f533c..503f257 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -383,6 +383,7 @@ DEF_HELPER_3(bcdctn, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfz, i32, avr, avr, i32)
DEF_HELPER_3(bcdctz, i32, avr, avr, i32)
DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32)
+DEF_HELPER_3(bcdctsq, i32, avr, avr, i32)
DEF_HELPER_2(xsadddp, void, env, i32)
DEF_HELPER_2(xssubdp, void, env, i32)
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 751909c..ca0d0b8 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2919,6 +2919,46 @@ uint32_t helper_bcdcfsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
return cr;
}
+uint32_t helper_bcdctsq(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps)
+{
+ uint8_t i;
+ int cr;
+ uint64_t carry;
+ uint64_t unused;
+ uint64_t lo_value;
+ uint64_t hi_value = 0;
+ int sgnb = bcd_get_sgn(b);
+ int invalid = (sgnb == 0);
+
+ lo_value = bcd_get_digit(b, 31, &invalid);
+ for (i = 30; i > 0; i--) {
+ mulu64(&lo_value, &carry, lo_value, 10ULL);
+ mulu64(&hi_value, &unused, hi_value, 10ULL);
+ lo_value += bcd_get_digit(b, i, &invalid);
+ hi_value += carry;
+
+ if (unlikely(invalid)) {
+ break;
+ }
+ }
+
+ if (sgnb == -1) {
+ r->s64[LO_IDX] = -lo_value;
+ r->s64[HI_IDX] = ~hi_value + !r->s64[LO_IDX];
+ } else {
+ r->s64[LO_IDX] = lo_value;
+ r->s64[HI_IDX] = hi_value;
+ }
+
+ cr = bcd_cmp_zero(b);
+
+ if (unlikely(invalid)) {
+ cr = 1 << CRF_SO;
+ }
+
+ return cr;
+}
+
void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a)
{
int i;
diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c
index 36141e5..1579b58 100644
--- a/target-ppc/translate/vmx-impl.inc.c
+++ b/target-ppc/translate/vmx-impl.inc.c
@@ -990,10 +990,14 @@ GEN_BCD2(bcdctn)
GEN_BCD2(bcdcfz)
GEN_BCD2(bcdctz)
GEN_BCD2(bcdcfsq)
+GEN_BCD2(bcdctsq)
static void gen_xpnd04_1(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 0:
+ gen_bcdctsq(ctx);
+ break;
case 2:
gen_bcdcfsq(ctx);
break;
@@ -1018,6 +1022,9 @@ static void gen_xpnd04_1(DisasContext *ctx)
static void gen_xpnd04_2(DisasContext *ctx)
{
switch (opc4(ctx->opcode)) {
+ case 0:
+ gen_bcdctsq(ctx);
+ break;
case 2:
gen_bcdcfsq(ctx);
break;
--
2.7.4
next prev parent reply other threads:[~2016-11-23 16:22 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-23 16:21 [Qemu-devel] [PATCH v2 0/4] POWER9 TCG enablements - BCD functions part II Jose Ricardo Ziviani
2016-11-23 16:21 ` [Qemu-devel] [PATCH v2 1/4] target-ppc: Implement bcdcfsq. instruction Jose Ricardo Ziviani
2016-11-24 0:43 ` Richard Henderson
2016-11-24 1:20 ` David Gibson
2016-11-24 16:31 ` [Qemu-devel] [Qemu-ppc] " joserz
2016-11-24 22:16 ` David Gibson
2016-11-24 1:18 ` [Qemu-devel] " David Gibson
2016-11-23 16:21 ` Jose Ricardo Ziviani [this message]
2016-11-24 1:24 ` [Qemu-devel] [PATCH v2 2/4] target-ppc: Implement bcdctsq. instruction David Gibson
2016-11-23 16:21 ` [Qemu-devel] [PATCH v2 3/4] target-ppc: Implement bcdcpsgn. instruction Jose Ricardo Ziviani
2016-11-24 1:26 ` David Gibson
2016-11-23 16:21 ` [Qemu-devel] [PATCH v2 4/4] target-ppc: Implement bcdsetsgn. instruction Jose Ricardo Ziviani
2016-11-24 1:27 ` David Gibson
2016-11-24 1:28 ` [Qemu-devel] [PATCH v2 0/4] POWER9 TCG enablements - BCD functions part II David Gibson
2016-11-24 16:36 ` [Qemu-devel] [Qemu-ppc] " joserz
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