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From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Laurent Vivier <laurent@vivier.eu>, qemu-devel@nongnu.org
Subject: Re: [PATCH 3/3] q800: add machine id register
Date: Sat, 14 Dec 2019 14:15:35 +0100	[thread overview]
Message-ID: <147a4c04-3833-b812-977f-786f36c02bd6@redhat.com> (raw)
In-Reply-To: <20191212200142.15688-4-laurent@vivier.eu>

On 12/12/19 9:01 PM, Laurent Vivier wrote:
> MacOS reads this address to identify the hardware.
> 
> This is a basic implementation returning the ID of Quadra 800.
> 
> Details:
> 
>    http://mess.redump.net/mess/driver_info/mac_technical_notes
> 
> "There are 3 ID schemes [...]
>   The third and most scalable is a machine ID register at 0x5ffffffc.
>   The top word must be 0xa55a to be valid. Then bits 15-11 are 0 for
>   consumer Macs, 1 for portables, 2 for high-end 68k, and 3 for high-end
>   PowerPC. Bit 10 is 1 if additional ID bits appear elsewhere (e.g. in VIA1).
>   The rest of the bits are a per-model identifier.
> 
>   Model                          Lower 16 bits of ID
> ...
>   Quadra/Centris 610/650/800     0x2BAD"
> 
> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
> ---
>   hw/m68k/q800.c | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
> 
> diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
> index 9ee0cb1141..c2b2aa779f 100644
> --- a/hw/m68k/q800.c
> +++ b/hw/m68k/q800.c
> @@ -97,6 +97,23 @@ static void main_cpu_reset(void *opaque)
>       cpu->env.pc = ldl_phys(cs->as, 4);
>   }
>   
> +static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size)
> +{
> +    return 0xa55a2bad; /* Quadra 800 ID */
> +}
> +
> +static void machine_id_write(void *opaque, hwaddr addr, uint64_t val,
> +                             unsigned size)
> +{

Maybe worth adding:

        qemu_log_mask(LOG_GUEST_ERROR, ...);

> +}
> +
> +static const MemoryRegionOps machine_id_ops = {
> +    .read = machine_id_read,
> +    .write = machine_id_write,
> +    .valid.min_access_size = 4,
> +    .valid.max_access_size = 4,

I think you want s/valid/impl/, because i.e. the guest could use 16-bit 
access right?

> +};
> +
>   static void q800_init(MachineState *machine)
>   {
>       M68kCPU *cpu = NULL;
> @@ -110,6 +127,7 @@ static void q800_init(MachineState *machine)
>       MemoryRegion *rom;
>       MemoryRegion *ram;
>       MemoryRegion *io;
> +    MemoryRegion *machine_id;
>       const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1;
>       int i;
>       ram_addr_t ram_size = machine->ram_size;
> @@ -159,6 +177,10 @@ static void q800_init(MachineState *machine)
>           g_free(name);
>       }
>   
> +    machine_id = g_malloc(sizeof(*machine_id));

We now prefer g_new(MemoryRegion, 1).

> +    memory_region_init_io(machine_id, NULL, &machine_id_ops, NULL, "Machine ID", 4);
> +    memory_region_add_subregion(get_system_memory(), 0x5ffffffc, machine_id);

To keep the style consistent, can you use a MACHINEID_BASE definition 
instead?

> +
>       /* djMEMC memory and interrupt controller */
>   
>       djmemc_dev = qdev_create(NULL, TYPE_DJMEMC);
> 



  parent reply	other threads:[~2019-12-14 21:20 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-12 20:01 [PATCH 0/3] q800: update machine emulation Laurent Vivier
2019-12-12 20:01 ` [PATCH 1/3] q800: fix ESCC base Laurent Vivier
2019-12-14 10:51   ` Mark Cave-Ayland
2019-12-12 20:01 ` [PATCH 2/3] q800: add djMEMC memory controller Laurent Vivier
2019-12-12 21:12   ` BALATON Zoltan
2019-12-12 22:07   ` Philippe Mathieu-Daudé
2019-12-14 10:54   ` Mark Cave-Ayland
2019-12-12 20:01 ` [PATCH 3/3] q800: add machine id register Laurent Vivier
2019-12-14 10:55   ` Mark Cave-Ayland
2019-12-14 13:15   ` Philippe Mathieu-Daudé [this message]
2019-12-14 10:58 ` [PATCH 0/3] q800: update machine emulation Mark Cave-Ayland

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