From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50293) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cA7aO-00020L-9X for qemu-devel@nongnu.org; Thu, 24 Nov 2016 22:54:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cA7aJ-0005K1-Dz for qemu-devel@nongnu.org; Thu, 24 Nov 2016 22:54:04 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:56109) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cA7aJ-0005Jg-5X for qemu-devel@nongnu.org; Thu, 24 Nov 2016 22:53:59 -0500 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id uAP3mZVi066845 for ; Thu, 24 Nov 2016 22:53:58 -0500 Received: from e24smtp01.br.ibm.com (e24smtp01.br.ibm.com [32.104.18.85]) by mx0a-001b2d01.pphosted.com with ESMTP id 26x3djj65b-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 24 Nov 2016 22:53:57 -0500 Received: from localhost by e24smtp01.br.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 25 Nov 2016 01:53:55 -0200 From: Jose Ricardo Ziviani Date: Fri, 25 Nov 2016 01:53:33 -0200 In-Reply-To: <1480046013-24788-1-git-send-email-joserz@linux.vnet.ibm.com> References: <1480046013-24788-1-git-send-email-joserz@linux.vnet.ibm.com> Message-Id: <1480046013-24788-5-git-send-email-joserz@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v3 4/4] target-ppc: Implement bcdsetsgn. instruction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org Cc: qemu-devel@nongnu.org, david@gibson.dropbear.id.au, nikunj@linux.vnet.ibm.com, bharata@linux.vnet.ibm.com bcdsetsgn.: Decimal set sign. This instruction copies the register value to the result register but adjust the signal according to the preferred sign value. Signed-off-by: Jose Ricardo Ziviani Reviewed-by: David Gibson --- target-ppc/helper.h | 1 + target-ppc/int_helper.c | 19 +++++++++++++++++++ target-ppc/translate/vmx-impl.inc.c | 8 ++++++++ 3 files changed, 28 insertions(+) diff --git a/target-ppc/helper.h b/target-ppc/helper.h index 2974101..ac8901f 100644 --- a/target-ppc/helper.h +++ b/target-ppc/helper.h @@ -385,6 +385,7 @@ DEF_HELPER_3(bcdctz, i32, avr, avr, i32) DEF_HELPER_3(bcdcfsq, i32, avr, avr, i32) DEF_HELPER_3(bcdctsq, i32, avr, avr, i32) DEF_HELPER_4(bcdcpsgn, i32, avr, avr, avr, i32) +DEF_HELPER_3(bcdsetsgn, i32, avr, avr, i32) DEF_HELPER_2(xsadddp, void, env, i32) DEF_HELPER_2(xssubdp, void, env, i32) diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index e69a5a4..25c8580 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -2975,6 +2975,25 @@ uint32_t helper_bcdcpsgn(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b, uint32_t ps) return bcd_cmp_zero(r); } +uint32_t helper_bcdsetsgn(ppc_avr_t *r, ppc_avr_t *b, uint32_t ps) +{ + int i; + int invalid = 0; + int sgnb = bcd_get_sgn(b); + + *r = *b; + bcd_put_digit(r, bcd_preferred_sgn(sgnb, ps), 0); + + for (i = 1; i < 32; i++) { + bcd_get_digit(b, i, &invalid); + if (unlikely(invalid)) { + return CRF_SO; + } + } + + return bcd_cmp_zero(r); +} + void helper_vsbox(ppc_avr_t *r, ppc_avr_t *a) { int i; diff --git a/target-ppc/translate/vmx-impl.inc.c b/target-ppc/translate/vmx-impl.inc.c index c14b666..b188e60 100644 --- a/target-ppc/translate/vmx-impl.inc.c +++ b/target-ppc/translate/vmx-impl.inc.c @@ -991,6 +991,7 @@ GEN_BCD2(bcdcfz) GEN_BCD2(bcdctz) GEN_BCD2(bcdcfsq) GEN_BCD2(bcdctsq) +GEN_BCD2(bcdsetsgn) GEN_BCD(bcdcpsgn); static void gen_xpnd04_1(DisasContext *ctx) @@ -1014,6 +1015,9 @@ static void gen_xpnd04_1(DisasContext *ctx) case 7: gen_bcdcfn(ctx); break; + case 31: + gen_bcdsetsgn(ctx); + break; default: gen_invalid(ctx); break; @@ -1038,12 +1042,16 @@ static void gen_xpnd04_2(DisasContext *ctx) case 7: gen_bcdcfn(ctx); break; + case 31: + gen_bcdsetsgn(ctx); + break; default: gen_invalid(ctx); break; } } + GEN_VXFORM_DUAL(vsubcuw, PPC_ALTIVEC, PPC_NONE, \ xpnd04_1, PPC_NONE, PPC2_ISA300) GEN_VXFORM_DUAL(vsubsws, PPC_ALTIVEC, PPC_NONE, \ -- 2.7.4