From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48230) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cCvEL-0004w9-Fh for qemu-devel@nongnu.org; Fri, 02 Dec 2016 16:18:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cCvEI-0003Oc-JP for qemu-devel@nongnu.org; Fri, 02 Dec 2016 16:18:53 -0500 Received: from mx1.redhat.com ([209.132.183.28]:40558) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cCvEI-0003OI-DD for qemu-devel@nongnu.org; Fri, 02 Dec 2016 16:18:50 -0500 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 975DA69CAE for ; Fri, 2 Dec 2016 21:18:49 +0000 (UTC) From: Eduardo Habkost Date: Fri, 2 Dec 2016 19:18:11 -0200 Message-Id: <1480713496-11213-13-git-send-email-ehabkost@redhat.com> In-Reply-To: <1480713496-11213-1-git-send-email-ehabkost@redhat.com> References: <1480713496-11213-1-git-send-email-ehabkost@redhat.com> Subject: [Qemu-devel] [PATCH for-2.9 12/17] target-i386: Return migration-safe field on query-cpu-definitions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Return the migration-safe field on query-cpu-definitions. All CPU models in x86 are migration-safe except "host". Signed-off-by: Eduardo Habkost --- target-i386/cpu-qom.h | 2 ++ target-i386/cpu.c | 3 +++ 2 files changed, 5 insertions(+) diff --git a/target-i386/cpu-qom.h b/target-i386/cpu-qom.h index 93c9679..7561891 100644 --- a/target-i386/cpu-qom.h +++ b/target-i386/cpu-qom.h @@ -48,6 +48,7 @@ typedef struct X86CPUDefinition X86CPUDefinition; * X86CPUClass: * @cpu_def: CPU model definition * @ordering: Ordering on the "-cpu help" CPU model list. + * @migration_safe: See CpuDefinitionInfo::migration_safe * @parent_realize: The parent class' realize handler. * @parent_reset: The parent class' reset handler. * @@ -62,6 +63,7 @@ typedef struct X86CPUClass { X86CPUDefinition *cpu_def; int ordering; + bool migration_safe; /* Optional description of CPU model. * If unavailable, cpu_def->model_id is used */ diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 76a6a30..78b25af 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2195,6 +2195,8 @@ static void x86_cpu_definition_entry(gpointer data, gpointer user_data) x86_cpu_class_check_missing_features(cc, &info->unavailable_features); info->has_unavailable_features = true; info->q_typename = g_strdup(object_class_get_name(oc)); + info->migration_safe = cc->migration_safe; + info->has_migration_safe = true; entry = g_malloc0(sizeof(*entry)); entry->value = info; @@ -2317,6 +2319,7 @@ static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data) X86CPUClass *xcc = X86_CPU_CLASS(oc); xcc->cpu_def = cpudef; + xcc->migration_safe = true; } static void x86_register_cpudef_type(X86CPUDefinition *def) -- 2.7.4