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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH 02/13] target-ppc: add mask_u128 routine
Date: Mon,  5 Dec 2016 16:55:19 +0530	[thread overview]
Message-ID: <1480937130-24561-3-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1480937130-24561-1-git-send-email-nikunj@linux.vnet.ibm.com>

Adjust FUNC_MASK define and add function to generate mask_u128

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target-ppc/internal.h | 38 +++++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 9 deletions(-)

diff --git a/target-ppc/internal.h b/target-ppc/internal.h
index 66cde46..27d956f 100644
--- a/target-ppc/internal.h
+++ b/target-ppc/internal.h
@@ -18,9 +18,9 @@
 #ifndef PPC_INTERNAL_H
 #define PPC_INTERNAL_H
 
-#define FUNC_MASK(name, ret_type, size, max_val)                  \
-static inline ret_type name(uint##size##_t start,                 \
-                              uint##size##_t end)                 \
+#define FUNC_MASK(name, ret_type, size, in_type, max_val)         \
+static inline ret_type name(in_type start,                        \
+                            in_type end)                          \
 {                                                                 \
     ret_type ret, max_bit = size - 1;                             \
                                                                   \
@@ -29,8 +29,8 @@ static inline ret_type name(uint##size##_t start,                 \
     } else if (likely(end == max_bit)) {                          \
         ret = max_val >> start;                                   \
     } else {                                                      \
-        ret = (((uint##size##_t)(-1ULL)) >> (start)) ^            \
-            (((uint##size##_t)(-1ULL) >> (end)) >> 1);            \
+        ret = (((in_type)(-1ULL)) >> (start)) ^                   \
+            (((in_type)(-1ULL) >> (end)) >> 1);                   \
         if (unlikely(start > end)) {                              \
             return ~ret;                                          \
         }                                                         \
@@ -40,12 +40,32 @@ static inline ret_type name(uint##size##_t start,                 \
 }
 
 #if defined(TARGET_PPC64)
-FUNC_MASK(MASK, target_ulong, 64, UINT64_MAX);
+FUNC_MASK(MASK, target_ulong, 64, uint64_t, UINT64_MAX);
 #else
-FUNC_MASK(MASK, target_ulong, 32, UINT32_MAX);
+FUNC_MASK(MASK, target_ulong, 32, uint32_t, UINT32_MAX);
+#endif
+FUNC_MASK(mask_u32, uint32_t, 32, uint32_t, UINT32_MAX);
+FUNC_MASK(mask_u64, uint64_t, 64, uint64_t, UINT64_MAX);
+
+#if defined(CONFIG_INT128)
+FUNC_MASK(mask_u128, Int128, 128, Int128, ~((__uint128_t)0));
+#else
+static inline Int128 mask_u128(int start, int end)
+{
+    Int128 r = {0};
+    if (start > 63) {
+        r.hi = 0;
+        r.lo = mask_u64(start - 64, end - 64);
+    } else if (end < 64) {
+        r.hi = mask_u64(start, end);
+        r.lo = 0;
+    } else {
+        r.hi = mask_u64(start, 63);
+        r.lo = mask_u64(0, end - 64);
+    }
+    return r;
+}
 #endif
-FUNC_MASK(mask_u32, uint32_t, 32, UINT32_MAX);
-FUNC_MASK(mask_u64, uint64_t, 64, UINT64_MAX);
 
 /*****************************************************************************/
 /***                           Instruction decoding                        ***/
-- 
2.7.4

  parent reply	other threads:[~2016-12-05 11:25 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-05 11:25 [Qemu-devel] [PATCH ppc-for-2.9 00/13] POWER9 TCG enablements - part9 Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 01/13] target-ppc: move ppc_vsr_t to common header Nikunj A Dadhania
2016-12-05 11:25 ` Nikunj A Dadhania [this message]
2016-12-05 17:36   ` [Qemu-devel] [PATCH 02/13] target-ppc: add mask_u128 routine Richard Henderson
2016-12-06  5:19     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 03/13] target-ppc: implement lxvl instruction Nikunj A Dadhania
2016-12-05 17:46   ` Richard Henderson
2016-12-06  5:25     ` Nikunj A Dadhania
2016-12-06 10:11     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 04/13] target-ppc: implement lxvll instruction Nikunj A Dadhania
2016-12-05 17:52   ` Richard Henderson
2016-12-05 17:59     ` Richard Henderson
2016-12-06  5:45     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 05/13] target-ppc: implement stxvl instruction Nikunj A Dadhania
2016-12-05 17:55   ` Richard Henderson
2016-12-06  5:46     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 06/13] target-ppc: implement stxvll instructions Nikunj A Dadhania
2016-12-05 17:57   ` Richard Henderson
2016-12-06  6:03     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 07/13] target-ppc: implement xxextractuw instruction Nikunj A Dadhania
2016-12-05 18:10   ` Richard Henderson
2016-12-05 11:25 ` [Qemu-devel] [PATCH 08/13] target-ppc: implement xxinsertw instruction Nikunj A Dadhania
2016-12-05 18:14   ` Richard Henderson
2016-12-05 11:25 ` [Qemu-devel] [PATCH 09/13] target-ppc: implement stop instruction Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 10/13] target-ppc: implement xsabsqp/xsnabsqp instruction Nikunj A Dadhania
2016-12-05 18:14   ` Richard Henderson
2016-12-05 11:25 ` [Qemu-devel] [PATCH 11/13] target-ppc: implement xsnegqp instruction Nikunj A Dadhania
2016-12-05 18:15   ` Richard Henderson
2016-12-06  8:45     ` Nikunj A Dadhania
2016-12-05 11:25 ` [Qemu-devel] [PATCH 12/13] target-ppc: implement xscpsgnqp instruction Nikunj A Dadhania
2016-12-05 18:18   ` Richard Henderson
2016-12-05 11:25 ` [Qemu-devel] [PATCH 13/13] target-ppc: Add xxperm and xxpermr instructions Nikunj A Dadhania
2016-12-06  4:11   ` David Gibson
2016-12-06  8:55     ` Bharata B Rao
2016-12-06  4:12 ` [Qemu-devel] [PATCH ppc-for-2.9 00/13] POWER9 TCG enablements - part9 David Gibson

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