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From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org
Cc: kevin.tian@intel.com, famz@redhat.com, mst@redhat.com,
	jasowang@redhat.com, alex.williamson@redhat.com,
	peterx@redhat.com
Subject: [Qemu-devel] [PATCH v3 0/2] VT-d supports 48 bits address width
Date: Wed, 14 Dec 2016 10:09:03 +0800	[thread overview]
Message-ID: <1481681345-32424-1-git-send-email-peterx@redhat.com> (raw)

V3:
- renaming "aw-bits" to "x-aw-bits", and clarify that this parameter
  is experimental [AlexW]

(V2 is mostly a re-written of V1, so no change log is appended)

The first patch did some check to make sure the CE GAW bits are always
valid.

The second patch extended VT-d GAW (Guest Address Width) from 39 bits
to 48 bits by providing "aw-bits" parameter for intel-iommu.

Test done:

- boot vm without "x-aw-bits" or "x-aw-bits=39": guest boots with 39 bits
- boot vm with "x-aw-bits=48": guest boots with 48 bits
- boot vm with illegal x-aw-bits: guest refuses to boot

Please review. Thanks,

Peter Xu (2):
  intel_iommu: check validity for GAW bits in CE
  intel_iommu: provide "x-aw-bits" parameter

 hw/i386/acpi-build.c           |  8 +++++++-
 hw/i386/intel_iommu.c          | 38 ++++++++++++++++++++++++++++++++------
 hw/i386/intel_iommu_internal.h | 13 ++++++-------
 include/hw/i386/intel_iommu.h  |  1 +
 4 files changed, 46 insertions(+), 14 deletions(-)

-- 
2.7.4

             reply	other threads:[~2016-12-14  2:09 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-14  2:09 Peter Xu [this message]
2016-12-14  2:09 ` [Qemu-devel] [PATCH v3 1/2] intel_iommu: check validity for GAW bits in CE Peter Xu
2016-12-14  2:48   ` Michael S. Tsirkin
2016-12-14  2:53     ` Peter Xu
2016-12-16  2:28       ` Tian, Kevin
2016-12-14  2:09 ` [Qemu-devel] [PATCH v3 2/2] intel_iommu: provide "x-aw-bits" parameter Peter Xu

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