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From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>, Richard Henderson <rth@twiddle.net>
Subject: [Qemu-devel] [PULL 03/12] target-m68k: add cmpm
Date: Sat, 24 Dec 2016 12:40:24 +0100	[thread overview]
Message-ID: <1482579633-3393-4-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1482579633-3393-1-git-send-email-laurent@vivier.eu>

Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1477604609-2206-2-git-send-email-laurent@vivier.eu>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1478206203-4606-4-git-send-email-rth@twiddle.net>
---
 target/m68k/translate.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index aaa221e..97edb7b 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -2224,6 +2224,21 @@ DISAS_INSN(cmpa)
     gen_update_cc_cmp(s, reg, src, OS_LONG);
 }
 
+DISAS_INSN(cmpm)
+{
+    int opsize = insn_opsize(insn);
+    TCGv src, dst;
+
+    /* Post-increment load (mode 3) from Ay.  */
+    src = gen_ea_mode(env, s, 3, REG(insn, 0), opsize,
+                      NULL_QREG, NULL, EA_LOADS);
+    /* Post-increment load (mode 3) from Ax.  */
+    dst = gen_ea_mode(env, s, 3, REG(insn, 9), opsize,
+                      NULL_QREG, NULL, EA_LOADS);
+
+    gen_update_cc_cmp(s, dst, src, opsize);
+}
+
 DISAS_INSN(eor)
 {
     TCGv src;
@@ -3465,6 +3480,7 @@ void register_m68k_insns (CPUM68KState *env)
     INSN(cmpa,      b1c0, f1c0, CF_ISA_A);
     INSN(cmp,       b000, f100, M68000);
     INSN(eor,       b100, f100, M68000);
+    INSN(cmpm,      b108, f138, M68000);
     INSN(cmpa,      b0c0, f0c0, M68000);
     INSN(eor,       b180, f1c0, CF_ISA_A);
     BASE(and,       c000, f000);
-- 
2.7.4

  parent reply	other threads:[~2016-12-24 11:40 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-12-24 11:40 [Qemu-devel] [PULL 00/12] M68k for 2.9 patches Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 01/12] target-m68k: Delay autoinc writeback Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 02/12] target-m68k: Split gen_lea and gen_ea Laurent Vivier
2016-12-24 11:40 ` Laurent Vivier [this message]
2016-12-24 11:40 ` [Qemu-devel] [PULL 04/12] target-m68k: add 64bit mull Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 05/12] target-m68k: add 680x0 divu/divs variants Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 06/12] target-m68k: add abcd/sbcd/nbcd Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 07/12] target-m68k: add cas/cas2 ops Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 08/12] target-m68k: Implement 680x0 movem Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 09/12] target-m68k: Do not cpu_abort on undefined insns Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 10/12] target-m68k: Inline shifts Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 11/12] target-m68k: add rol/ror/roxl/roxr instructions Laurent Vivier
2016-12-24 11:40 ` [Qemu-devel] [PULL 12/12] target-m68k: free TCG variables that are not Laurent Vivier
2016-12-27 16:44 ` [Qemu-devel] [PULL 00/12] M68k for 2.9 patches Peter Maydell

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