From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 12/25] aspeed: QOMify the CPU object and attach it to the SoC
Date: Tue, 27 Dec 2016 15:21:04 +0000 [thread overview]
Message-ID: <1482852077-19397-13-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1482852077-19397-1-git-send-email-peter.maydell@linaro.org>
From: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Message-id: 1480434248-27138-4-git-send-email-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/aspeed_soc.h | 2 +-
hw/arm/aspeed_soc.c | 17 ++++++++++++++---
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 5406b49..6f1b679 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -27,7 +27,7 @@ typedef struct AspeedSoCState {
DeviceState parent;
/*< public >*/
- ARMCPU *cpu;
+ ARMCPU cpu;
MemoryRegion iomem;
AspeedVICState vic;
AspeedTimerCtrlState timerctrl;
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index e14f5c2..db145e2 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -87,9 +87,13 @@ static void aspeed_soc_init(Object *obj)
{
AspeedSoCState *s = ASPEED_SOC(obj);
AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
+ char *cpu_typename;
int i;
- s->cpu = cpu_arm_init(sc->info->cpu_model);
+ cpu_typename = g_strdup_printf("%s-" TYPE_ARM_CPU, sc->info->cpu_model);
+ object_initialize(&s->cpu, sizeof(s->cpu), cpu_typename);
+ object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
+ g_free(cpu_typename);
object_initialize(&s->vic, sizeof(s->vic), TYPE_ASPEED_VIC);
object_property_add_child(obj, "vic", OBJECT(&s->vic), NULL);
@@ -146,6 +150,13 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion_overlap(get_system_memory(),
ASPEED_SOC_IOMEM_BASE, &s->iomem, -1);
+ /* CPU */
+ object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
/* VIC */
object_property_set_bool(OBJECT(&s->vic), true, "realized", &err);
if (err) {
@@ -154,9 +165,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->vic), 0, ASPEED_SOC_VIC_BASE);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 0,
- qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ));
+ qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_IRQ));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->vic), 1,
- qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ));
+ qdev_get_gpio_in(DEVICE(&s->cpu), ARM_CPU_FIQ));
/* Timer */
object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err);
--
2.7.4
next prev parent reply other threads:[~2016-12-27 15:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-27 15:20 [Qemu-devel] [PULL 00/25] target-arm queue Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 01/25] cadence_uart: Check baud rate generator and divider values on migration Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 02/25] cadence_uart: Check if receiver timeout counter is disabled Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 03/25] Correct value of ARM Cortex-A8 MVFR1 register Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 04/25] target-arm: Fix aarch64 vec_reg_offset Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 05/25] target-arm: Fix aarch64 disas_ldst_single_struct Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 06/25] hw/intc/arm_gicv3_common: fix aff3 in typer Peter Maydell
2016-12-27 15:20 ` [Qemu-devel] [PULL 07/25] target-arm: Log AArch64 exception returns Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 08/25] hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 09/25] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 10/25] hw/arm/virt: add 2.9 machine type Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 11/25] m25p80: add support for the mx66l1g45g Peter Maydell
2016-12-27 15:21 ` Peter Maydell [this message]
2016-12-27 15:21 ` [Qemu-devel] [PULL 13/25] aspeed: remove cannot_destroy_with_object_finalize_yet Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 14/25] aspeed: attach the second SPI controller object to the SoC Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 15/25] aspeed: extend the board configuration with flash models Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 16/25] aspeed: add support for the romulus-bmc board Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 17/25] aspeed: add a memory region for SRAM Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 18/25] aspeed: add the definitions for the AST2400 A1 SoC Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 19/25] aspeed: change SoC revision of the palmetto-bmc machine Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 20/25] aspeed/scu: fix SCU region size Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 21/25] aspeed/smc: improve segment register support Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 22/25] aspeed/smc: set the number of flash modules for the FMC controller Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 23/25] hw/arm: remove trailing whitespace Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 24/25] hw/i2c: Add a NULL check for i2c slave init callbacks Peter Maydell
2016-12-27 15:21 ` [Qemu-devel] [PULL 25/25] target-arm: Add VBAR support to ARM1176 CPUs Peter Maydell
2016-12-27 17:25 ` [Qemu-devel] [PULL 00/25] target-arm queue Peter Maydell
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