From: Peter Xu <peterx@redhat.com>
To: qemu-devel@nongnu.org, kvm@vger.kernel.org
Cc: "Jan Kiszka" <jan.kiszka@web.de>,
"Paolo Bonzini" <pbonzini@redhat.com>,
agordeev@redhat.com, "Radim Krčmář" <rkrcmar@redhat.com>,
"Andrew Jones" <drjones@redhat.com>,
peterx@redhat.com
Subject: [Qemu-devel] [kvm-unit-tests PATCH 6/8] intel-iommu: use atomic ops for irte index alloc
Date: Fri, 30 Dec 2016 16:55:58 +0800 [thread overview]
Message-ID: <1483088160-6714-7-git-send-email-peterx@redhat.com> (raw)
In-Reply-To: <1483088160-6714-1-git-send-email-peterx@redhat.com>
To allow concurrent allocation of irte index. Meanwhile, move the IRTE
setup debug line into the alloc since vtd_setup_msi() might not be the
only one to dump this info in the future.
Signed-off-by: Peter Xu <peterx@redhat.com>
---
lib/x86/intel-iommu.c | 10 +++++++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/lib/x86/intel-iommu.c b/lib/x86/intel-iommu.c
index 20b9240..a3ce678 100644
--- a/lib/x86/intel-iommu.c
+++ b/lib/x86/intel-iommu.c
@@ -13,6 +13,7 @@
#include "intel-iommu.h"
#include "libcflat.h"
#include "pci.h"
+#include "atomic.h"
/*
* VT-d in QEMU currently only support 39 bits address width, which is
@@ -239,9 +240,13 @@ void vtd_map_range(uint16_t sid, iova_t iova, phys_addr_t pa, size_t size)
static uint16_t vtd_intr_index_alloc(void)
{
- static int index_ctr = 0;
+ static volatile int index_ctr = 0;
+ int ctr;
+
assert(index_ctr < 65535);
- return index_ctr++;
+ ctr = atomic_inc_fetch(&index_ctr);
+ printf("INTR: alloc IRTE index %d\n", ctr);
+ return ctr;
}
static void vtd_setup_irte(struct pci_dev *dev, vtd_irte_t *irte,
@@ -296,7 +301,6 @@ bool vtd_setup_msi(struct pci_dev *dev, int vector, int dest_id)
assert(sizeof(vtd_msi_addr_t) == 8);
assert(sizeof(vtd_msi_data_t) == 4);
- printf("INTR: setup IRTE index %d\n", index);
vtd_setup_irte(dev, irte + index, vector, dest_id);
msi_addr.handle_15 = index >> 15 & 1;
--
2.7.4
next prev parent reply other threads:[~2016-12-30 8:56 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-30 8:55 [Qemu-devel] [kvm-unit-tests PATCH 0/8] VT-d ioapic irq test Peter Xu
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 1/8] pci: introduce pci_intx_line() Peter Xu
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 2/8] pci: introduce pci_msi_set_enable() Peter Xu
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 3/8] lib/asm-generic: add atomic.h Peter Xu
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 4/8] x86: ioapic: generalize trigger mode Peter Xu
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 5/8] intel-iommu: add report prefixes Peter Xu
2016-12-30 8:55 ` Peter Xu [this message]
2016-12-30 8:55 ` [Qemu-devel] [kvm-unit-tests PATCH 7/8] intel-iommu: allow setup trigger mode for irte Peter Xu
2016-12-30 8:56 ` [Qemu-devel] [kvm-unit-tests PATCH 8/8] intel-iommu: add ioapic irq test Peter Xu
2017-01-12 12:14 ` [Qemu-devel] [kvm-unit-tests PATCH 0/8] VT-d " Paolo Bonzini
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