From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v1 08/14] target-ppc: Use correct precision for FPRF setting
Date: Fri, 6 Jan 2017 11:44:50 +0530 [thread overview]
Message-ID: <1483683296-32568-9-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1483683296-32568-1-git-send-email-nikunj@linux.vnet.ibm.com>
From: Bharata B Rao <bharata@linux.vnet.ibm.com>
Use correct FP precision when setting FPRF in FP conversion helpers
instead of always assuming float64 precision.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
target/ppc/fpu_helper.c | 4 ++--
target/ppc/internal.h | 1 +
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index aacfd12..05b2926 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -109,6 +109,7 @@ void helper_compute_fprf_##tp(CPUPPCState *env, tp arg) \
}
COMPUTE_FPRF(float16)
+COMPUTE_FPRF(float32)
COMPUTE_FPRF(float64)
COMPUTE_FPRF(float128)
@@ -2688,8 +2689,7 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
xt.tfld = ttp##_snan_to_qnan(xt.tfld); \
} \
if (sfprf) { \
- helper_compute_fprf_float64(env, ttp##_to_float64(xt.tfld, \
- &env->fp_status)); \
+ helper_compute_fprf_##ttp(env, xt.tfld); \
} \
} \
\
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 16fc117..8dcc679 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -246,4 +246,5 @@ static inline void putVSR(int n, ppc_vsr_t *vsr, CPUPPCState *env)
void helper_compute_fprf_float128(CPUPPCState *env, float128 arg);
void helper_compute_fprf_float16(CPUPPCState *env, float16 arg);
+void helper_compute_fprf_float32(CPUPPCState *env, float32 arg);
#endif /* PPC_INTERNAL_H */
--
2.7.4
next prev parent reply other threads:[~2017-01-06 6:16 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 6:14 [Qemu-devel] [PATCH v1 00/14] POWER9 TCG enablements - part10 Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 01/14] target-ppc: Add xxextractuw instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 02/14] target-ppc: Add xxinsertw instruction Nikunj A Dadhania
2017-01-06 7:54 ` David Gibson
2017-01-06 8:28 ` Nikunj A Dadhania
2017-01-07 1:02 ` David Gibson
2017-01-07 1:03 ` David Gibson
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 03/14] target-ppc: Use float64 arg in helper_compute_fprf() Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 04/14] target-ppc: Replace isden by float64_is_zero_or_denormal Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 05/14] target-ppc: Rename helper_compute_fprf to helper_compute_fprf_float64 Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 06/14] target-ppc: Add xsaddqp instructions Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 07/14] target-ppc: Add xscvdphp, xscvhpdp Nikunj A Dadhania
2017-01-06 6:14 ` Nikunj A Dadhania [this message]
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 09/14] target-ppc: Add xscvdpqp instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 10/14] target-ppc: Add xscvqpdp instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 11/14] target-ppc: Add xsxexpdp instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 12/14] target-ppc: Add xsxexpqp instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 13/14] target-ppc: Add xsxsigdp instruction Nikunj A Dadhania
2017-01-06 6:14 ` [Qemu-devel] [PATCH v1 14/14] target-ppc: Add xsxsigqp instructions Nikunj A Dadhania
2017-01-09 2:49 ` [Qemu-devel] [PATCH v1 00/14] POWER9 TCG enablements - part10 David Gibson
2017-01-09 6:51 ` Nikunj A Dadhania
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