From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH 1/7] target-ppc: Use ppc_vsr_t.f128 in xscmp[o, u, exp]qp
Date: Thu, 12 Jan 2017 21:54:05 +0530 [thread overview]
Message-ID: <1484238251-8096-2-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1484238251-8096-1-git-send-email-nikunj@linux.vnet.ibm.com>
From: Bharata B Rao <bharata@linux.vnet.ibm.com>
xscmpoqp, xscmpuqp & xscmpexpqp were added before f128 field was
introduced in ppc_vsr_t. Now that we have it, use it instead of
generating the 128 bit float using two 64bit fields.
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
target/ppc/fpu_helper.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index ae57272..d648234 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -2452,8 +2452,8 @@ void helper_xscmpexpqp(CPUPPCState *env, uint32_t opcode)
exp_a = extract64(xa.VsrD(0), 48, 15);
exp_b = extract64(xb.VsrD(0), 48, 15);
- if (unlikely(float128_is_any_nan(make_float128(xa.VsrD(0), xa.VsrD(1))) ||
- float128_is_any_nan(make_float128(xb.VsrD(0), xb.VsrD(1))))) {
+ if (unlikely(float128_is_any_nan(xa.f128) ||
+ float128_is_any_nan(xb.f128))) {
cc = CRF_SO;
} else {
if (exp_a < exp_b) {
@@ -2528,24 +2528,20 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
ppc_vsr_t xa, xb; \
uint32_t cc = 0; \
bool vxsnan_flag = false, vxvc_flag = false; \
- float128 a, b; \
\
helper_reset_fpstatus(env); \
getVSR(rA(opcode) + 32, &xa, env); \
getVSR(rB(opcode) + 32, &xb, env); \
\
- a = make_float128(xa.VsrD(0), xa.VsrD(1)); \
- b = make_float128(xb.VsrD(0), xb.VsrD(1)); \
- \
- if (float128_is_signaling_nan(a, &env->fp_status) || \
- float128_is_signaling_nan(b, &env->fp_status)) { \
+ if (float128_is_signaling_nan(xa.f128, &env->fp_status) || \
+ float128_is_signaling_nan(xb.f128, &env->fp_status)) { \
vxsnan_flag = true; \
cc = CRF_SO; \
if (fpscr_ve == 0 && ordered) { \
vxvc_flag = true; \
} \
- } else if (float128_is_quiet_nan(a, &env->fp_status) || \
- float128_is_quiet_nan(b, &env->fp_status)) { \
+ } else if (float128_is_quiet_nan(xa.f128, &env->fp_status) || \
+ float128_is_quiet_nan(xb.f128, &env->fp_status)) { \
cc = CRF_SO; \
if (ordered) { \
vxvc_flag = true; \
@@ -2558,9 +2554,9 @@ void helper_##op(CPUPPCState *env, uint32_t opcode) \
float_invalid_op_excp(env, POWERPC_EXCP_FP_VXVC, 0); \
} \
\
- if (float128_lt(a, b, &env->fp_status)) { \
+ if (float128_lt(xa.f128, xb.f128, &env->fp_status)) { \
cc |= CRF_LT; \
- } else if (!float128_le(a, b, &env->fp_status)) { \
+ } else if (!float128_le(xa.f128, xb.f128, &env->fp_status)) { \
cc |= CRF_GT; \
} else { \
cc |= CRF_EQ; \
--
2.7.4
next prev parent reply other threads:[~2017-01-12 16:24 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-12 16:24 [Qemu-devel] [PATCH 0/7] POWER9 TCG enablements - part12 Nikunj A Dadhania
2017-01-12 16:24 ` Nikunj A Dadhania [this message]
2017-01-12 16:24 ` [Qemu-devel] [PATCH 2/7] target-ppc: Add xscvsdqp and xscvudqp instructions Nikunj A Dadhania
2017-01-12 16:24 ` [Qemu-devel] [PATCH 3/7] target-ppc: Add xsdivqp instruction Nikunj A Dadhania
2017-01-12 16:24 ` [Qemu-devel] [PATCH 4/7] target-ppc: Add xsmulqp instruction Nikunj A Dadhania
2017-01-12 16:24 ` [Qemu-devel] [PATCH 5/7] target-ppc: Add xvcv[hpsp, sphp] instructions Nikunj A Dadhania
2017-01-12 16:24 ` [Qemu-devel] [PATCH 6/7] target-ppc: Add xvtstdc[sp, dp] instructions Nikunj A Dadhania
2017-01-12 17:23 ` Richard Henderson
2017-01-13 3:32 ` Nikunj A Dadhania
2017-01-12 16:24 ` [Qemu-devel] [PATCH 7/7] target-ppc: Add xststdc[sp, dp, qp] instructions Nikunj A Dadhania
2017-01-13 3:01 ` [Qemu-devel] [PATCH 0/7] POWER9 TCG enablements - part12 David Gibson
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