From: Laurent Vivier <laurent@vivier.eu>
To: qemu-devel@nongnu.org
Cc: rth@twiddle.net, Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] [PATCH 4/5] target-m68k: CAS doesn't need aligned access
Date: Thu, 12 Jan 2017 21:18:03 +0100 [thread overview]
Message-ID: <1484252284-29291-5-git-send-email-laurent@vivier.eu> (raw)
In-Reply-To: <1484252284-29291-1-git-send-email-laurent@vivier.eu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
target/m68k/translate.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 23e2b06..cf5d8dd 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -1934,7 +1934,6 @@ DISAS_INSN(cas)
default:
g_assert_not_reached();
}
- opc |= MO_ALIGN;
ext = read_im16(env, s);
--
2.7.4
next prev parent reply other threads:[~2017-01-12 20:18 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-12 20:17 [Qemu-devel] [PATCH 0/5] Fixes for target/m68k Laurent Vivier
2017-01-12 20:18 ` [Qemu-devel] [PATCH 1/5] target-m68k: fix bit operation with immediate value Laurent Vivier
2017-01-12 20:18 ` [Qemu-devel] [PATCH 2/5] target-m68k: fix gen_flush_flags() Laurent Vivier
2017-01-12 20:18 ` [Qemu-devel] [PATCH 3/5] target-m68k: manage pre-dec et post-inc in CAS Laurent Vivier
2017-01-12 20:18 ` Laurent Vivier [this message]
2017-01-12 20:18 ` [Qemu-devel] [PATCH 5/5] target-m68k: increment/decrement with SP Laurent Vivier
2017-01-12 21:14 ` Thomas Huth
2017-01-12 21:35 ` Laurent Vivier
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