From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 03/22] armv7m: Replace armv7m.hack with unassigned_access handler
Date: Fri, 27 Jan 2017 15:31:58 +0000 [thread overview]
Message-ID: <1485531137-2362-4-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1485531137-2362-1-git-send-email-peter.maydell@linaro.org>
From: Michael Davidsaver <mdavidsaver@gmail.com>
For v7m we need to catch attempts to execute from special
addresses at 0xfffffff0 and above. Previously we did this
with the aid of a hacky special purpose lump of memory
in the address space and a check in translate.c for whether
we were translating code at those addresses.
We can implement this more cleanly using a CPU
unassigned access handler which throws the exception
if the unassigned access is for one of the special addresses.
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1484937883-1068-3-git-send-email-peter.maydell@linaro.org
[PMM:
* drop the deletion of the "don't interrupt if PC is magic"
code in arm_v7m_cpu_exec_interrupt() -- this is still
required
* don't generate an exception for unassigned accesses
which aren't to the magic address -- although doing
this is in theory correct in practice it will break
currently working guests which rely on the RAZ/WI
behaviour when they touch devices which we haven't
modelled.
* trigger EXCP_EXCEPTION_EXIT on is_exec, not !is_write
]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/armv7m.c | 8 --------
target/arm/cpu.c | 28 ++++++++++++++++++++++++++++
target/arm/translate.c | 12 ++++++------
3 files changed, 34 insertions(+), 14 deletions(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 49d3078..0c9ca7b 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -180,7 +180,6 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
uint64_t entry;
uint64_t lowaddr;
int big_endian;
- MemoryRegion *hack = g_new(MemoryRegion, 1);
if (cpu_model == NULL) {
cpu_model = "cortex-m3";
@@ -225,13 +224,6 @@ DeviceState *armv7m_init(MemoryRegion *system_memory, int mem_size, int num_irq,
}
}
- /* Hack to map an additional page of ram at the top of the address
- space. This stops qemu complaining about executing code outside RAM
- when returning from an exception. */
- memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000, &error_fatal);
- vmstate_register_ram_global(hack);
- memory_region_add_subregion(system_memory, 0xfffff000, hack);
-
qemu_register_reset(armv7m_reset, cpu);
return nvic;
}
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index a941f66..9075989 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -292,6 +292,33 @@ bool arm_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
}
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
+static void arm_v7m_unassigned_access(CPUState *cpu, hwaddr addr,
+ bool is_write, bool is_exec, int opaque,
+ unsigned size)
+{
+ ARMCPU *arm = ARM_CPU(cpu);
+ CPUARMState *env = &arm->env;
+
+ /* ARMv7-M interrupt return works by loading a magic value into the PC.
+ * On real hardware the load causes the return to occur. The qemu
+ * implementation performs the jump normally, then does the exception
+ * return by throwing a special exception when when the CPU tries to
+ * execute code at the magic address.
+ */
+ if (env->v7m.exception != 0 && addr >= 0xfffffff0 && is_exec) {
+ cpu->exception_index = EXCP_EXCEPTION_EXIT;
+ cpu_loop_exit(cpu);
+ }
+
+ /* In real hardware an attempt to access parts of the address space
+ * with nothing there will usually cause an external abort.
+ * However our QEMU board models are often missing device models where
+ * the guest can boot anyway with the default read-as-zero/writes-ignored
+ * behaviour that you get without a QEMU unassigned_access hook.
+ * So just return here to retain that default behaviour.
+ */
+}
+
static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
{
CPUClass *cc = CPU_GET_CLASS(cs);
@@ -1016,6 +1043,7 @@ static void arm_v7m_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = arm_v7m_cpu_do_interrupt;
#endif
+ cc->do_unassigned_access = arm_v7m_unassigned_access;
cc->cpu_exec_interrupt = arm_v7m_cpu_exec_interrupt;
}
diff --git a/target/arm/translate.c b/target/arm/translate.c
index c9186b6..a7c2abe 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11719,12 +11719,12 @@ void gen_intermediate_code(CPUARMState *env, TranslationBlock *tb)
break;
}
#else
- if (dc->pc >= 0xfffffff0 && arm_dc_feature(dc, ARM_FEATURE_M)) {
- /* We always get here via a jump, so know we are not in a
- conditional execution block. */
- gen_exception_internal(EXCP_EXCEPTION_EXIT);
- dc->is_jmp = DISAS_EXC;
- break;
+ if (arm_dc_feature(dc, ARM_FEATURE_M)) {
+ /* Branches to the magic exception-return addresses should
+ * already have been caught via the arm_v7m_unassigned_access hook,
+ * and never get here.
+ */
+ assert(dc->pc < 0xfffffff0);
}
#endif
--
2.7.4
next prev parent reply other threads:[~2017-01-27 15:32 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-27 15:31 [Qemu-devel] [PULL 00/22] target-arm queue Peter Maydell
2017-01-27 15:31 ` [Qemu-devel] [PULL 01/22] aspeed/smc: handle dummy bytes when doing fast reads in command mode Peter Maydell
2017-01-27 15:31 ` [Qemu-devel] [PULL 02/22] armv7m: MRS/MSR: handle unprivileged access Peter Maydell
2017-01-27 15:31 ` Peter Maydell [this message]
2017-01-27 15:31 ` [Qemu-devel] [PULL 04/22] armv7m: Explicit error for bad vector table Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 05/22] hw/registerfields.h: Pull FIELD etc macros out of hw/register.h Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 06/22] armv7m: Fix reads of CONTROL register bit 1 Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 07/22] armv7m: Clear FAULTMASK on return from non-NMI exceptions Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 08/22] pflash_cfi01: fix per-device sector length in CFI table Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 09/22] target/arm: Drop IS_M() macro Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 10/22] armv7m_nvic: keep a pointer to the CPU Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 11/22] armv7m: add state for v7M CCR, CFSR, HFSR, DFSR, MMFAR, BFAR Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 12/22] armv7m: implement CCR, CFSR, HFSR, DFSR, BFAR, and MMFAR Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 13/22] armv7m: honour CCR.STACKALIGN on exception entry Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 14/22] armv7m: set CFSR.UNDEFINSTR on undefined instructions Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 15/22] armv7m: Report no-coprocessor faults correctly Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 16/22] armv7m: Honour CCR.USERSETMPEND Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 17/22] armv7m: FAULTMASK should be 0 on reset Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 18/22] armv7m: R14 should reset to 0xffffffff Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 19/22] arm: stellaris: make MII accesses complete immediately Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 20/22] hw/char/exynos4210_uart: Drop unused local variable frame_size Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 21/22] arm_gicv3: Fix broken logic in ELRSR calculation Peter Maydell
2017-01-27 15:32 ` [Qemu-devel] [PULL 22/22] dma: omap: check dma channel data_type Peter Maydell
2017-01-27 16:12 ` [Qemu-devel] [PULL 00/22] target-arm queue no-reply
2017-01-30 10:23 ` Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1485531137-2362-4-git-send-email-peter.maydell@linaro.org \
--to=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).