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From: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH Risu 2/2] risu_ppc64: Compare FPSCR flags
Date: Mon, 30 Jan 2017 00:47:37 -0200	[thread overview]
Message-ID: <1485744457-10324-3-git-send-email-joserz@linux.vnet.ibm.com> (raw)
In-Reply-To: <1485744457-10324-1-git-send-email-joserz@linux.vnet.ibm.com>

When running FP operations, FPSCR flag must be compared to make sure
that any exception will behave consistently.

Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
---
 risu_reginfo_ppc64le.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/risu_reginfo_ppc64le.c b/risu_reginfo_ppc64le.c
index 4dc509c..ee0e55e 100644
--- a/risu_reginfo_ppc64le.c
+++ b/risu_reginfo_ppc64le.c
@@ -21,6 +21,7 @@
 
 #define XER 37
 #define CCR 38
+#define FPREG 32
 
 /* reginfo_init: initialize with a ucontext */
 void reginfo_init(struct reginfo *ri, ucontext_t *uc)
@@ -82,6 +83,10 @@ int reginfo_is_eq(struct reginfo *m, struct reginfo *a, ucontext_t *uc)
         }
     }
 
+    if (m->fpregs[FPREG] != a->fpregs[FPREG]) {
+        return 0;
+    }
+
     for (i = 0; i < 32; i++) {
         if (m->vrregs.vrregs[i][0] != a->vrregs.vrregs[i][0] ||
                 m->vrregs.vrregs[i][1] != a->vrregs.vrregs[i][1] ||
-- 
2.7.4

  parent reply	other threads:[~2017-01-30  2:48 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-30  2:47 [Qemu-devel] [PATCH Risu 0/2] PPC64 improvements Jose Ricardo Ziviani
2017-01-30  2:47 ` [Qemu-devel] [PATCH Risu 1/2] risu_ppc64: Fix Risu to run under qemu linux user Jose Ricardo Ziviani
2017-01-30 11:26   ` Alex Bennée
2017-01-30 11:49   ` Peter Maydell
2017-01-31 22:09     ` joserz
2017-01-30  2:47 ` Jose Ricardo Ziviani [this message]
2017-02-03 11:47   ` [Qemu-devel] [PATCH Risu 2/2] risu_ppc64: Compare FPSCR flags Peter Maydell

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