From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57522) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYa9w-0007ZY-Hx for qemu-devel@nongnu.org; Tue, 31 Jan 2017 10:15:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cYa9v-00019l-Lm for qemu-devel@nongnu.org; Tue, 31 Jan 2017 10:15:52 -0500 From: Wei Huang Date: Tue, 31 Jan 2017 10:15:43 -0500 Message-Id: <1485875745-27741-4-git-send-email-wei@redhat.com> In-Reply-To: <1485875745-27741-1-git-send-email-wei@redhat.com> References: <1485875745-27741-1-git-send-email-wei@redhat.com> Subject: [Qemu-devel] [PATCH V2 3/5] target-arm: Add support for PMU register PMXEVCNTR_EL0 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, peter.maydell@linaro.org To make PMU register support complete, this patch adds support for PMXEVCNTR_EL0. Signed-off-by: Wei Huang --- target/arm/helper.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index c8620d9..6b8460a 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1255,6 +1255,10 @@ static const ARMCPRegInfo v7_cp_reginfo[] = { { .name = "PMXEVCNTR", .cp = 15, .crn = 9, .crm = 13, .opc1 = 0, .opc2 = 2, .access = PL0_RW, .type = ARM_CP_CONST, .resetvalue = 0, .accessfn = pmreg_access }, + { .name = "PMXEVCNTR_EL0", .state = ARM_CP_STATE_AA64, + .opc0 = 3, .opc1 = 3, .crn = 9, .crm = 13, .opc2 = 2, + .access = PL0_RW, .type = ARM_CP_CONST, .resetvalue = 0, + .accessfn = pmreg_access }, { .name = "PMUSERENR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 0, .access = PL0_R | PL1_RW, .accessfn = access_tpm, .fieldoffset = offsetof(CPUARMState, cp15.c9_pmuserenr), -- 1.8.3.1