From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46110) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cYbDG-0001Ar-Sd for qemu-devel@nongnu.org; Tue, 31 Jan 2017 11:23:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cYbDF-0001FO-Nq for qemu-devel@nongnu.org; Tue, 31 Jan 2017 11:23:22 -0500 From: vijay.kilari@gmail.com Date: Tue, 31 Jan 2017 21:52:57 +0530 Message-Id: <1485879782-6075-1-git-send-email-vijay.kilari@gmail.com> Subject: [Qemu-devel] [PATCH v7 RESEND 0/5] GICv3 live migration support List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-arm@nongnu.org, peter.maydell@linaro.org, christoffer.dall@linaro.org, eric.auger@redhat.com Cc: p.fedin@samsung.com, marc.zyngier@arm.com, qemu-devel@nongnu.org, Vijaya Kumar K From: Vijaya Kumar K This series introduces support for GICv3 live migration with new VGIC implementation in 4.7-rc3 kernel. In this series, patch 1 of the previous implementation are ported. https://lists.nongnu.org/archive/html/qemu-devel/2015-10/msg05284.html Patch 2, is based on below implementation. http://patchwork.ozlabs.org/patch/626746/ Latest kernel patches https://www.spinics.net/lists/arm-kernel/msg558046.html This API definition is as per version of VGICv3 specification in linux kernel Documentation/virtual/kvm/devices/arm-vgic-v3.txt Tested Live migration of Idle VM running with 4 VCPUs and 8GB RAM. v6 => v7: - Rebased on top of v2.8.0-rc4 release. - Added patch to add icc_ctrl_el1 to vmstruct before live migration patch. - Added patch to add gicv3state variable to CPUARMState struct to store GICv3CPUState pointer. - Added patch to register ARMCPRegInfo[] struct and reset on CPU reset. v5 => v6: - Added separate patch for Reseting ICC* register - Added seperate patch for save and restore of ICC_CTLR_EL1 - Dropped translate_fn mechanism and coded open functions for edge_trigger and priority save and restore. - Save and Restore APnR registers based on ICC_CTLR_EL1.PRIBITS v4 => v5: - Initialized ICC registers before reset. v3 => v4: - Reintroduced offset GICR_SGI_OFFSET - Implement save and restore of ICC_SRE_EL1 - Updated kvm.h header file in sync with KVM v4 patches v2 => v3: - Dropped offset GICR_SGI_OFFSET - Implement save/restore of irq line level using KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO - Fixed bug with save/restore of edge_trigger Vijaya Kumar K (5): kernel: Add definitions for GICv3 attributes hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate hw/intc/arm_gicv3_kvm: Implement get/put functions target-arm: Add GICv3CPUState in CPUARMState struct hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers hw/intc/arm_gicv3_common.c | 1 + hw/intc/arm_gicv3_kvm.c | 640 ++++++++++++++++++++++++++++++++++++- hw/intc/gicv3_internal.h | 1 + include/hw/intc/arm_gicv3_common.h | 1 + linux-headers/asm-arm/kvm.h | 12 + linux-headers/asm-arm64/kvm.h | 12 + target-arm/cpu.h | 2 + 7 files changed, 658 insertions(+), 11 deletions(-) -- 1.9.1