From: Kirill Batuzov <batuzovk@ispras.ru>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <rth@twiddle.net>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Peter Crosthwaite" <crosthwaite.peter@gmail.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Andrzej Zaborowski" <balrogg@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
"Kirill Batuzov" <batuzovk@ispras.ru>
Subject: [Qemu-devel] [PATCH v2.1 06/21] tcg: use results of alias analysis in liveness analysis
Date: Thu, 2 Feb 2017 17:34:44 +0300 [thread overview]
Message-ID: <1486046099-17726-7-git-send-email-batuzovk@ispras.ru> (raw)
In-Reply-To: <1486046099-17726-1-git-send-email-batuzovk@ispras.ru>
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>
---
tcg/tcg.c | 61 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 61 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 18d97ec..27e5944 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -564,6 +564,11 @@ static intptr_t tcg_type_size(TCGType type)
}
}
+static intptr_t tcg_temp_size(const TCGTemp *tmp)
+{
+ return tcg_type_size(tmp->type);
+}
+
int tcg_global_mem_new_internal(TCGType base_type, TCGv_ptr base,
intptr_t offset, const char *name)
{
@@ -1472,6 +1477,43 @@ static inline void tcg_la_bb_end(TCGContext *s, uint8_t *temp_state)
}
}
+/* Check if memory write completely overwrites temp's memory location.
+ If this is the case then the temp can be considered dead. */
+static int tcg_temp_overwrite(TCGContext *s, const TCGTemp *tmp,
+ const TCGAliasInfo *ai)
+{
+ if (!(ai->alias_type & TCG_ALIAS_WRITE) || !ai->fixed_offset) {
+ return 0;
+ }
+ if (tmp->mem_base != &s->temps[GET_TCGV_PTR(s->tcg_env)]) {
+ return 0;
+ }
+ if (ai->offset > tmp->mem_offset
+ || ai->offset + ai->size < tmp->mem_offset + tcg_temp_size(tmp)) {
+ return 0;
+ }
+ return 1;
+}
+
+/* Check if memory read or write overlaps with temp's memory location.
+ If this is the case then the temp must be synced to memory. */
+static int tcg_temp_overlap(TCGContext *s, const TCGTemp *tmp,
+ const TCGAliasInfo *ai)
+{
+ if (!ai->fixed_offset || tmp->fixed_reg) {
+ return 0;
+ }
+ if (tmp->mem_base != &s->temps[GET_TCGV_PTR(s->tcg_env)]) {
+ return 1;
+ }
+ if (ai->offset >= tmp->mem_offset + tcg_temp_size(tmp)
+ || ai->offset + ai->size <= tmp->mem_offset) {
+ return 0;
+ } else {
+ return 1;
+ }
+}
+
/* Liveness analysis : update the opc_arg_life array to tell if a
given input arguments is dead. Instructions updating dead
temporaries are removed. */
@@ -1674,6 +1716,23 @@ static void liveness_pass_1(TCGContext *s, uint8_t *temp_state)
temp_state[arg] = TS_DEAD;
}
+ /* record if the operation uses some globals' memory location */
+ if (s->alias_info[oi].alias_type != TCG_NOT_ALIAS) {
+ for (i = 0; i < s->nb_globals; i++) {
+ if (tcg_temp_overwrite(s, &s->temps[i],
+ &s->alias_info[oi])) {
+ temp_state[i] = TS_DEAD;
+ } else if (tcg_temp_overlap(s, &s->temps[i],
+ &s->alias_info[oi])) {
+ if (s->alias_info[oi].alias_type & TCG_ALIAS_READ) {
+ temp_state[i] = TS_MEM | TS_DEAD;
+ } else if (!(temp_state[i] & TS_DEAD)) {
+ temp_state[i] |= TS_MEM;
+ }
+ }
+ }
+ }
+
/* if end of basic block, update */
if (def->flags & TCG_OPF_BB_END) {
tcg_la_bb_end(s, temp_state);
@@ -2622,6 +2681,8 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb)
s->la_time -= profile_getclock();
#endif
+ tcg_alias_analysis(s);
+
{
uint8_t *temp_state = tcg_malloc(s->nb_temps + s->nb_indirects);
--
2.1.4
next prev parent reply other threads:[~2017-02-02 14:35 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-02 14:34 [Qemu-devel] [PATCH v2.1 00/20] Emulate guest vector operations with host vector operations Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 01/21] tcg: add support for 128bit vector type Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 02/21] tcg: add support for 64bit " Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 03/21] tcg: support representing vector type with smaller vector or scalar types Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 04/21] tcg: add ld_v128, ld_v64, st_v128 and st_v64 opcodes Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 05/21] tcg: add simple alias analysis Kirill Batuzov
2017-02-02 14:34 ` Kirill Batuzov [this message]
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 07/21] tcg: allow globals to overlap Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 08/21] tcg: add vector addition operations Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 09/21] target/arm: support access to vector guest registers as globals Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 10/21] target/arm: use vector opcode to handle vadd.<size> instruction Kirill Batuzov
2017-02-09 13:19 ` Philippe Mathieu-Daudé
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 11/21] tcg/i386: add support for vector opcodes Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 12/21] tcg/i386: support 64-bit vector operations Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 13/21] tcg/i386: support remaining vector addition operations Kirill Batuzov
[not found] ` <2089cbe3-0e9b-fae2-0e35-224f2765dc28@amsat.org>
[not found] ` <32a902a1-e8c7-c2f7-ac66-148e02ee0b2d@amsat.org>
2017-02-21 13:29 ` Kirill Batuzov
2017-02-21 16:21 ` Alex Bennée
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 14/21] tcg: do not rely on exact values of MO_BSWAP or MO_SIGN in backend Kirill Batuzov
2017-05-05 13:59 ` Alex Bennée
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 15/21] target/aarch64: do not check for non-existent TCGMemOp Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 16/21] tcg: introduce new TCGMemOp - MO_128 Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 17/21] tcg: introduce qemu_ld_v128 and qemu_st_v128 opcodes Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 18/21] softmmu: create helpers for vector loads Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 19/21] tcg/i386: add support for qemu_ld_v128/qemu_st_v128 ops Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 20/21] target/arm: load two consecutive 64-bits vector regs as a 128-bit vector reg Kirill Batuzov
2017-02-02 14:34 ` [Qemu-devel] [PATCH v2.1 21/21] tcg/README: update README to include information about vector opcodes Kirill Batuzov
2017-02-02 15:25 ` [Qemu-devel] [PATCH v2.1 00/20] Emulate guest vector operations with host vector operations no-reply
2017-02-21 12:19 ` Kirill Batuzov
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