* [Qemu-devel] [RFC PATCH v1 0/2] softfloat: float128 to uint64 and uint32 @ 2017-02-07 8:04 Bharata B Rao 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() Bharata B Rao 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao 0 siblings, 2 replies; 7+ messages in thread From: Bharata B Rao @ 2017-02-07 8:04 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-ppc, david, rth, nikunj, peter.maydell, Bharata B Rao This series introduces two conversion routines: float128_to_uint64_round_to_zero() and float128_to_uint32_round_to_zero(). float128_to_uint64_round_to_zero() uses the newly added float128_to_uint64() whose implementation is based on float64_to_uint64(). float128_to_uint32_round_to_zero() uses float128_to_uint64_round_to_zero(). Changes in v1: -------------- - Reimplemented float128_to_uint64() based on float64_to_uint64(). - Added float128_to_uint32_round_to_zero(). v0: https://www.mail-archive.com/qemu-devel@nongnu.org/msg426756.html Bharata B Rao (2): softfloat: Add float128_to_uint64_round_to_zero() softfloat: Add float128_to_uint32_round_to_zero() fpu/softfloat.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++++ include/fpu/softfloat.h | 3 ++ 2 files changed, 90 insertions(+) -- 2.7.4 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() 2017-02-07 8:04 [Qemu-devel] [RFC PATCH v1 0/2] softfloat: float128 to uint64 and uint32 Bharata B Rao @ 2017-02-07 8:04 ` Bharata B Rao 2017-02-07 16:05 ` Peter Maydell 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao 1 sibling, 1 reply; 7+ messages in thread From: Bharata B Rao @ 2017-02-07 8:04 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-ppc, david, rth, nikunj, peter.maydell, Bharata B Rao Implement float128_to_uint64() and use that to implement float128_to_uint64_round_to_zero() This is required by xscvqpudz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> --- fpu/softfloat.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++ include/fpu/softfloat.h | 2 ++ 2 files changed, 61 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index c295f31..4a4b50b 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6109,6 +6109,65 @@ int64_t float128_to_int64_round_to_zero(float128 a, float_status *status) } /*---------------------------------------------------------------------------- +| Returns the result of converting the quadruple-precision floating-point value +| `a' to the 64-bit unsigned integer format. The conversion is +| performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic---which means in particular that the conversion is rounded +| according to the current rounding mode. If `a' is a NaN, the largest +| positive integer is returned. If the conversion overflows, the +| largest unsigned integer is returned. If 'a' is negative, the value is +| rounded and zero is returned; negative values that do not round to zero +| will raise the inexact exception. +*----------------------------------------------------------------------------*/ + +uint64_t float128_to_uint64(float128 a, float_status *status) +{ + flag aSign; + int aExp; + int shiftCount; + uint64_t aSig0, aSig1; + + aSig0 = extractFloat128Frac0(a); + aSig1 = extractFloat128Frac1(a); + aExp = extractFloat128Exp(a); + aSign = extractFloat128Sign(a); + if (aSign && (aExp > 0x3FFE)) { + float_raise(float_flag_invalid, status); + if (float128_is_any_nan(a)) { + return LIT64(0xFFFFFFFFFFFFFFFF); + } else { + return 0; + } + } + if (aExp) { + aSig0 |= LIT64(0x0001000000000000); + } + shiftCount = 0x402F - aExp; + if (shiftCount <= 0) { + if (0x403E < aExp) { + float_raise(float_flag_invalid, status); + return LIT64(0xFFFFFFFFFFFFFFFF); + } + shortShift128Left(aSig0, aSig1, -shiftCount, &aSig0, &aSig1); + } else { + shift64ExtraRightJamming(aSig0, aSig1, shiftCount, &aSig0, &aSig1); + } + return roundAndPackUint64(aSign, aSig0, aSig1, status); +} + +uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status) +{ + uint64_t v; + signed char current_rounding_mode = status->float_rounding_mode; + + set_float_rounding_mode(float_round_to_zero, status); + v = float128_to_uint64(a, status); + set_float_rounding_mode(current_rounding_mode, status); + + return v; +} + +/*---------------------------------------------------------------------------- | Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 842ec6b..4e99253 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -712,6 +712,8 @@ int32_t float128_to_int32(float128, float_status *status); int32_t float128_to_int32_round_to_zero(float128, float_status *status); int64_t float128_to_int64(float128, float_status *status); int64_t float128_to_int64_round_to_zero(float128, float_status *status); +uint64_t float128_to_uint64(float128, float_status *status); +uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() Bharata B Rao @ 2017-02-07 16:05 ` Peter Maydell 0 siblings, 0 replies; 7+ messages in thread From: Peter Maydell @ 2017-02-07 16:05 UTC (permalink / raw) To: Bharata B Rao Cc: QEMU Developers, qemu-ppc@nongnu.org, David Gibson, Richard Henderson, Nikunj A Dadhania On 7 February 2017 at 08:04, Bharata B Rao <bharata@linux.vnet.ibm.com> wrote: > Implement float128_to_uint64() and use that to implement > float128_to_uint64_round_to_zero() > > This is required by xscvqpudz instruction of PowerPC ISA 3.0. > > Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM ^ permalink raw reply [flat|nested] 7+ messages in thread
* [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() 2017-02-07 8:04 [Qemu-devel] [RFC PATCH v1 0/2] softfloat: float128 to uint64 and uint32 Bharata B Rao 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() Bharata B Rao @ 2017-02-07 8:04 ` Bharata B Rao 2017-02-07 15:57 ` Peter Maydell 2017-02-07 22:10 ` Richard Henderson 1 sibling, 2 replies; 7+ messages in thread From: Bharata B Rao @ 2017-02-07 8:04 UTC (permalink / raw) To: qemu-devel; +Cc: qemu-ppc, david, rth, nikunj, peter.maydell, Bharata B Rao float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> --- fpu/softfloat.c | 28 ++++++++++++++++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 29 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4a4b50b..ed76629 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6169,6 +6169,34 @@ uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status) /*---------------------------------------------------------------------------- | Returns the result of converting the quadruple-precision floating-point +| value `a' to the 32-bit unsigned integer format. The conversion +| is performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic except that the conversion is always rounded toward zero. +| If `a' is a NaN, the largest positive integer is returned. Otherwise, +| if the conversion overflows, the largest unsigned integer is returned. +| If 'a' is negative, the value is rounded and zero is returned; negative +| values that do not round to zero will raise the inexact exception. +*----------------------------------------------------------------------------*/ + +uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status) +{ + int64_t v; + uint32_t res; + int old_exc_flags = get_float_exception_flags(status); + + v = float128_to_uint64_round_to_zero(a, status); + if (v > 0xffffffff) { + res = 0xffffffff; + } else { + return v; + } + set_float_exception_flags(old_exc_flags, status); + float_raise(float_flag_invalid, status); + return res; +} + +/*---------------------------------------------------------------------------- +| Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point | Arithmetic. diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 4e99253..9eb5a6b 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -714,6 +714,7 @@ int64_t float128_to_int64(float128, float_status *status); int64_t float128_to_int64_round_to_zero(float128, float_status *status); uint64_t float128_to_uint64(float128, float_status *status); uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); +uint32_t float128_to_uint32_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao @ 2017-02-07 15:57 ` Peter Maydell 2017-02-07 22:10 ` Richard Henderson 1 sibling, 0 replies; 7+ messages in thread From: Peter Maydell @ 2017-02-07 15:57 UTC (permalink / raw) To: Bharata B Rao Cc: QEMU Developers, qemu-ppc@nongnu.org, David Gibson, Richard Henderson, Nikunj A Dadhania On 7 February 2017 at 08:04, Bharata B Rao <bharata@linux.vnet.ibm.com> wrote: > float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction > of PowerPC ISA 3.0. > > Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> > --- > fpu/softfloat.c | 28 ++++++++++++++++++++++++++++ > include/fpu/softfloat.h | 1 + > 2 files changed, 29 insertions(+) > Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao 2017-02-07 15:57 ` Peter Maydell @ 2017-02-07 22:10 ` Richard Henderson 2017-02-08 0:44 ` Bharata B Rao 1 sibling, 1 reply; 7+ messages in thread From: Richard Henderson @ 2017-02-07 22:10 UTC (permalink / raw) To: Bharata B Rao, qemu-devel; +Cc: qemu-ppc, david, nikunj, peter.maydell On 02/07/2017 12:04 AM, Bharata B Rao wrote: > + int64_t v; > + uint32_t res; > + int old_exc_flags = get_float_exception_flags(status); > + > + v = float128_to_uint64_round_to_zero(a, status); > + if (v > 0xffffffff) { v should be uint64_t. r~ ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() 2017-02-07 22:10 ` Richard Henderson @ 2017-02-08 0:44 ` Bharata B Rao 0 siblings, 0 replies; 7+ messages in thread From: Bharata B Rao @ 2017-02-08 0:44 UTC (permalink / raw) To: Richard Henderson; +Cc: qemu-devel, qemu-ppc, david, nikunj, peter.maydell On Tue, Feb 07, 2017 at 02:10:04PM -0800, Richard Henderson wrote: > On 02/07/2017 12:04 AM, Bharata B Rao wrote: > > + int64_t v; > > + uint32_t res; > > + int old_exc_flags = get_float_exception_flags(status); > > + > > + v = float128_to_uint64_round_to_zero(a, status); > > + if (v > 0xffffffff) { > > v should be uint64_t. Right, here is the updated patch... Peter/David - If you want both the patches to be posted afresh, let me know. (These patches apply on David's ppc-for-2.9 branch) >From 24afd78beb5f5742f9da76cf5330ea465697be7b Mon Sep 17 00:00:00 2001 From: Bharata B Rao <bharata@linux.vnet.ibm.com> Date: Mon, 30 Jan 2017 15:23:04 +0530 Subject: [PATCH v2 2/2] softfloat: Add float128_to_uint32_round_to_zero() float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction of PowerPC ISA 3.0. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> --- fpu/softfloat.c | 28 ++++++++++++++++++++++++++++ include/fpu/softfloat.h | 1 + 2 files changed, 29 insertions(+) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 4a4b50b..c2f0de0 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -6169,6 +6169,34 @@ uint64_t float128_to_uint64_round_to_zero(float128 a, float_status *status) /*---------------------------------------------------------------------------- | Returns the result of converting the quadruple-precision floating-point +| value `a' to the 32-bit unsigned integer format. The conversion +| is performed according to the IEC/IEEE Standard for Binary Floating-Point +| Arithmetic except that the conversion is always rounded toward zero. +| If `a' is a NaN, the largest positive integer is returned. Otherwise, +| if the conversion overflows, the largest unsigned integer is returned. +| If 'a' is negative, the value is rounded and zero is returned; negative +| values that do not round to zero will raise the inexact exception. +*----------------------------------------------------------------------------*/ + +uint32_t float128_to_uint32_round_to_zero(float128 a, float_status *status) +{ + uint64_t v; + uint32_t res; + int old_exc_flags = get_float_exception_flags(status); + + v = float128_to_uint64_round_to_zero(a, status); + if (v > 0xffffffff) { + res = 0xffffffff; + } else { + return v; + } + set_float_exception_flags(old_exc_flags, status); + float_raise(float_flag_invalid, status); + return res; +} + +/*---------------------------------------------------------------------------- +| Returns the result of converting the quadruple-precision floating-point | value `a' to the single-precision floating-point format. The conversion | is performed according to the IEC/IEEE Standard for Binary Floating-Point | Arithmetic. diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h index 4e99253..9eb5a6b 100644 --- a/include/fpu/softfloat.h +++ b/include/fpu/softfloat.h @@ -714,6 +714,7 @@ int64_t float128_to_int64(float128, float_status *status); int64_t float128_to_int64_round_to_zero(float128, float_status *status); uint64_t float128_to_uint64(float128, float_status *status); uint64_t float128_to_uint64_round_to_zero(float128, float_status *status); +uint32_t float128_to_uint32_round_to_zero(float128, float_status *status); float32 float128_to_float32(float128, float_status *status); float64 float128_to_float64(float128, float_status *status); floatx80 float128_to_floatx80(float128, float_status *status); -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-02-08 0:44 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-02-07 8:04 [Qemu-devel] [RFC PATCH v1 0/2] softfloat: float128 to uint64 and uint32 Bharata B Rao 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 1/2] softfloat: Add float128_to_uint64_round_to_zero() Bharata B Rao 2017-02-07 16:05 ` Peter Maydell 2017-02-07 8:04 ` [Qemu-devel] [RFC PATCH v1 2/2] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao 2017-02-07 15:57 ` Peter Maydell 2017-02-07 22:10 ` Richard Henderson 2017-02-08 0:44 ` Bharata B Rao
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