qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 00/13] target-arm queue
Date: Tue,  7 Feb 2017 18:37:12 +0000	[thread overview]
Message-ID: <1486492645-27803-1-git-send-email-peter.maydell@linaro.org> (raw)

A random mix of items here, nothing very major.

thanks
-- PMM


The following changes since commit d0dff238a87fa81393ed72754d4dc8b09e50b08b:

  Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170206' into staging (2017-02-07 15:29:26 +0000)

are available in the git repository at:

  git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170207

for you to fetch changes up to 7727b832886fafbdec7299eb7773dc9071bf4cdd:

  stellaris: Use the 'unimplemented' device for parts we don't implement (2017-02-07 18:30:00 +0000)

----------------------------------------------------------------
target-arm:
 * new "unimplemented" device for stubbing out devices in a
   system model so accesses can be logged
 * stellaris: document the SoC memory map
 * arm: create instruction syndromes for AArch32 data aborts
 * arm: Correctly handle watchpoints for BE32 CPUs
 * Fix Thumb-1 BE32 execution and disassembly
 * arm: Add cfgend parameter for ARM CPU selection
 * sd: sdhci: check data length during dma_memory_read
 * aspeed: add a watchdog controller
 * integratorcp: adding vmstate for save/restore

----------------------------------------------------------------
Cédric Le Goater (2):
      wdt: Add Aspeed watchdog device model
      aspeed: add a watchdog controller

Julian Brown (4):
      hw/arm/integratorcp: Support specifying features via -cpu
      target/arm: Add cfgend parameter for ARM CPU selection.
      Fix Thumb-1 BE32 execution and disassembly.
      arm: Correctly handle watchpoints for BE32 CPUs

Pavel Dovgalyuk (1):
      integratorcp: adding vmstate for save/restore

Peter Maydell (5):
      target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode
      target/arm: A32, T32: Create Instruction Syndromes for Data Aborts
      stellaris: Document memory map and which SoC devices are unimplemented
      hw/misc: New "unimplemented" sysbus device
      stellaris: Use the 'unimplemented' device for parts we don't implement

Prasad J Pandit (1):
      sd: sdhci: check data length during dma_memory_read

 hw/misc/Makefile.objs            |   2 +
 hw/watchdog/Makefile.objs        |   1 +
 include/disas/bfd.h              |   7 ++
 include/hw/arm/aspeed_soc.h      |   2 +
 include/hw/misc/unimp.h          |  39 +++++++
 include/hw/watchdog/wdt_aspeed.h |  32 ++++++
 include/qom/cpu.h                |   3 +
 target/arm/arm_ldst.h            |  10 +-
 target/arm/cpu.h                 |   7 ++
 target/arm/internals.h           |   5 +
 target/arm/translate.h           |  14 +++
 disas.c                          |   1 +
 exec.c                           |   1 +
 hw/arm/aspeed_soc.c              |  13 +++
 hw/arm/integratorcp.c            |  78 +++++++++++++-
 hw/arm/stellaris.c               |  48 +++++++++
 hw/misc/unimp.c                  | 107 +++++++++++++++++++
 hw/sd/sdhci.c                    |   2 +-
 hw/watchdog/wdt_aspeed.c         | 225 +++++++++++++++++++++++++++++++++++++++
 qom/cpu.c                        |   6 ++
 target/arm/cpu.c                 |  39 +++++++
 target/arm/op_helper.c           |  22 ++++
 target/arm/translate-a64.c       |  14 ---
 target/arm/translate.c           | 193 ++++++++++++++++++++++++---------
 24 files changed, 801 insertions(+), 70 deletions(-)
 create mode 100644 include/hw/misc/unimp.h
 create mode 100644 include/hw/watchdog/wdt_aspeed.h
 create mode 100644 hw/misc/unimp.c
 create mode 100644 hw/watchdog/wdt_aspeed.c

             reply	other threads:[~2017-02-07 18:37 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-07 18:37 Peter Maydell [this message]
2017-02-07 18:37 ` [Qemu-devel] [PULL 01/13] integratorcp: adding vmstate for save/restore Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 02/13] wdt: Add Aspeed watchdog device model Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 03/13] aspeed: add a watchdog controller Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 04/13] sd: sdhci: check data length during dma_memory_read Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 06/13] target/arm: Add cfgend parameter for ARM CPU selection Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 07/13] Fix Thumb-1 BE32 execution and disassembly Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 08/13] arm: Correctly handle watchpoints for BE32 CPUs Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 09/13] target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 10/13] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 11/13] stellaris: Document memory map and which SoC devices are unimplemented Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 12/13] hw/misc: New "unimplemented" sysbus device Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 13/13] stellaris: Use the 'unimplemented' device for parts we don't implement Peter Maydell
2017-02-07 18:55 ` [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2017-02-07 19:01 ` no-reply
  -- strict thread matches above, loose matches on Subject: below --
2018-03-19 18:34 Peter Maydell
2018-03-20  9:51 ` Peter Maydell
2017-10-12 16:03 Peter Maydell
2017-10-16  9:22 ` Peter Maydell
2015-11-03 14:13 Peter Maydell
2015-11-03 15:31 ` Peter Maydell
2015-10-16 13:57 Peter Maydell
2015-10-17 14:05 ` Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1486492645-27803-1-git-send-email-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).