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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 04/13] sd: sdhci: check data length during dma_memory_read
Date: Tue,  7 Feb 2017 18:37:16 +0000	[thread overview]
Message-ID: <1486492645-27803-5-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1486492645-27803-1-git-send-email-peter.maydell@linaro.org>

From: Prasad J Pandit <pjp@fedoraproject.org>

While doing multi block SDMA transfer in routine
'sdhci_sdma_transfer_multi_blocks', the 's->fifo_buffer' starting
index 'begin' and data length 's->data_count' could end up to be same.
This could lead to an OOB access issue. Correct transfer data length
to avoid it.

Cc: qemu-stable@nongnu.org
Reported-by: Jiang Xin <jiangxin1@huawei.com>
Signed-off-by: Prasad J Pandit <pjp@fedoraproject.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20170130064736.9236-1-ppandit@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/sd/sdhci.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 01fbf22..5bd5ab6 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -536,7 +536,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s)
                 boundary_count -= block_size - begin;
             }
             dma_memory_read(&address_space_memory, s->sdmasysad,
-                            &s->fifo_buffer[begin], s->data_count);
+                            &s->fifo_buffer[begin], s->data_count - begin);
             s->sdmasysad += s->data_count - begin;
             if (s->data_count == block_size) {
                 for (n = 0; n < block_size; n++) {
-- 
2.7.4

  parent reply	other threads:[~2017-02-07 18:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-07 18:37 [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 01/13] integratorcp: adding vmstate for save/restore Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 02/13] wdt: Add Aspeed watchdog device model Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 03/13] aspeed: add a watchdog controller Peter Maydell
2017-02-07 18:37 ` Peter Maydell [this message]
2017-02-07 18:37 ` [Qemu-devel] [PULL 05/13] hw/arm/integratorcp: Support specifying features via -cpu Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 06/13] target/arm: Add cfgend parameter for ARM CPU selection Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 07/13] Fix Thumb-1 BE32 execution and disassembly Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 08/13] arm: Correctly handle watchpoints for BE32 CPUs Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 09/13] target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 10/13] target/arm: A32, T32: Create Instruction Syndromes for Data Aborts Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 11/13] stellaris: Document memory map and which SoC devices are unimplemented Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 12/13] hw/misc: New "unimplemented" sysbus device Peter Maydell
2017-02-07 18:37 ` [Qemu-devel] [PULL 13/13] stellaris: Use the 'unimplemented' device for parts we don't implement Peter Maydell
2017-02-07 18:55 ` [Qemu-devel] [PULL 00/13] target-arm queue Peter Maydell
2017-02-07 19:01 ` no-reply

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