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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v1 0/2] POWER9 TCG enablements - part14
Date: Thu,  9 Feb 2017 11:03:29 +0530	[thread overview]
Message-ID: <1486618411-7018-1-git-send-email-nikunj@linux.vnet.ibm.com> (raw)

This series contains 4 new instructions for POWER9 ISA3.0
    Load/Store Atomic instructions

Changelog:
v0:
   Raise invalid execption for function codes that are not implemented, 
   and data storage execption for invalid function codes.

Balamuruhan S (2):
  target-ppc: implement load atomic instruction
  target-ppc: implement store atomic instruction

 target/ppc/internal.h  |   2 +
 target/ppc/translate.c | 111 +++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 113 insertions(+)

-- 
2.7.4

             reply	other threads:[~2017-02-09  5:33 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-09  5:33 Nikunj A Dadhania [this message]
2017-02-09  5:33 ` [Qemu-devel] [PATCH v1 1/2] target-ppc: implement load atomic instruction Nikunj A Dadhania
2017-02-09  5:33 ` [Qemu-devel] [PATCH v1 2/2] target-ppc: implement store " Nikunj A Dadhania
2017-02-09 23:58 ` [Qemu-devel] [PATCH v1 0/2] POWER9 TCG enablements - part14 David Gibson

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