From: Bharata B Rao <bharata@linux.vnet.ibm.com>
To: qemu-devel@nongnu.org
Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au,
rth@twiddle.net, nikunj@linux.vnet.ibm.com,
Bharata B Rao <bharata@linux.vnet.ibm.com>
Subject: [Qemu-devel] [PATCH 5/7] target-ppc: Add xscvqpudz and xscvqpuwz instructions
Date: Fri, 10 Feb 2017 12:53:09 +0530 [thread overview]
Message-ID: <1486711391-12247-6-git-send-email-bharata@linux.vnet.ibm.com> (raw)
In-Reply-To: <1486711391-12247-1-git-send-email-bharata@linux.vnet.ibm.com>
xscvqpudz: VSX Scalar truncate & Convert Quad-Precision format to
Unsigned Doubleword format
xscvqpuwz: VSX Scalar truncate & Convert Quad-Precision format to
Unsigned Word format
Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com>
---
target/ppc/fpu_helper.c | 2 ++
target/ppc/helper.h | 2 ++
target/ppc/translate/vsx-impl.inc.c | 2 ++
target/ppc/translate/vsx-ops.inc.c | 2 ++
4 files changed, 8 insertions(+)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 96f9801..58aee64 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -3086,6 +3086,8 @@ VSX_CVT_FP_TO_INT_VECTOR(xscvqpsdz, float128, int64, f128, VsrD(0), \
VSX_CVT_FP_TO_INT_VECTOR(xscvqpswz, float128, int32, f128, VsrD(0), \
0xffffffff80000000ULL)
+VSX_CVT_FP_TO_INT_VECTOR(xscvqpudz, float128, uint64, f128, VsrD(0), 0x0ULL)
+VSX_CVT_FP_TO_INT_VECTOR(xscvqpuwz, float128, uint32, f128, VsrD(0), 0x0ULL)
/* VSX_CVT_INT_TO_FP - VSX integer to floating point conversion
* op - instruction mnemonic
diff --git a/target/ppc/helper.h b/target/ppc/helper.h
index 007a837..6d77661 100644
--- a/target/ppc/helper.h
+++ b/target/ppc/helper.h
@@ -442,6 +442,8 @@ DEF_HELPER_2(xscvdpspn, i64, env, i64)
DEF_HELPER_2(xscvqpdp, void, env, i32)
DEF_HELPER_2(xscvqpsdz, void, env, i32)
DEF_HELPER_2(xscvqpswz, void, env, i32)
+DEF_HELPER_2(xscvqpudz, void, env, i32)
+DEF_HELPER_2(xscvqpuwz, void, env, i32)
DEF_HELPER_2(xscvhpdp, void, env, i32)
DEF_HELPER_2(xscvsdqp, void, env, i32)
DEF_HELPER_2(xscvspdp, void, env, i32)
diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
index 8de8cd0..7f12908 100644
--- a/target/ppc/translate/vsx-impl.inc.c
+++ b/target/ppc/translate/vsx-impl.inc.c
@@ -819,6 +819,8 @@ GEN_VSX_HELPER_XT_XB_ENV(xscvdpspn, 0x16, 0x10, 0, PPC2_VSX207)
GEN_VSX_HELPER_2(xscvqpdp, 0x04, 0x1A, 0x14, PPC2_ISA300)
GEN_VSX_HELPER_2(xscvqpsdz, 0x04, 0x1A, 0x19, PPC2_ISA300)
GEN_VSX_HELPER_2(xscvqpswz, 0x04, 0x1A, 0x09, PPC2_ISA300)
+GEN_VSX_HELPER_2(xscvqpudz, 0x04, 0x1A, 0x11, PPC2_ISA300)
+GEN_VSX_HELPER_2(xscvqpuwz, 0x04, 0x1A, 0x01, PPC2_ISA300)
GEN_VSX_HELPER_2(xscvhpdp, 0x16, 0x15, 0x10, PPC2_ISA300)
GEN_VSX_HELPER_2(xscvsdqp, 0x04, 0x1A, 0x0A, PPC2_ISA300)
GEN_VSX_HELPER_2(xscvspdp, 0x12, 0x14, 0, PPC2_VSX)
diff --git a/target/ppc/translate/vsx-ops.inc.c b/target/ppc/translate/vsx-ops.inc.c
index e20ca32..5030c4a 100644
--- a/target/ppc/translate/vsx-ops.inc.c
+++ b/target/ppc/translate/vsx-ops.inc.c
@@ -131,6 +131,8 @@ GEN_VSX_XFORM_300_EO(xscvdpqp, 0x04, 0x1A, 0x16, 0x00000001),
GEN_VSX_XFORM_300_EO(xscvqpdp, 0x04, 0x1A, 0x14, 0x0),
GEN_VSX_XFORM_300_EO(xscvqpsdz, 0x04, 0x1A, 0x19, 0x00000001),
GEN_VSX_XFORM_300_EO(xscvqpswz, 0x04, 0x1A, 0x09, 0x00000001),
+GEN_VSX_XFORM_300_EO(xscvqpudz, 0x04, 0x1A, 0x11, 0x00000001),
+GEN_VSX_XFORM_300_EO(xscvqpuwz, 0x04, 0x1A, 0x01, 0x00000001),
#ifdef TARGET_PPC64
GEN_XX2FORM_EO(xsxexpdp, 0x16, 0x15, 0x00, PPC2_ISA300),
--
2.7.4
next prev parent reply other threads:[~2017-02-10 7:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-10 7:23 [Qemu-devel] [PATCH 0/7] POWER9 TCG and softfloat enablements - part16 + s390 float fixes Bharata B Rao
2017-02-10 7:23 ` [Qemu-devel] [PATCH 1/7] softfloat: Add round-to-odd rounding mode Bharata B Rao
2017-02-10 7:23 ` [Qemu-devel] [PATCH 2/7] softfloat: Add float128_to_uint64_round_to_zero() Bharata B Rao
2017-02-10 7:23 ` [Qemu-devel] [PATCH 3/7] softfloat: Add float128_to_uint32_round_to_zero() Bharata B Rao
2017-02-10 7:23 ` [Qemu-devel] [PATCH 4/7] target-ppc: Implement round to odd variants of quad FP instructions Bharata B Rao
2017-02-10 7:23 ` Bharata B Rao [this message]
2017-02-10 7:23 ` [Qemu-devel] [PATCH 6/7] softfloat: Add float128_to_uint32() Bharata B Rao
2017-02-10 7:23 ` [Qemu-devel] [PATCH 7/7] target-s390: Use float128_to_uint[64/32] where required Bharata B Rao
2017-02-13 1:40 ` [Qemu-devel] [PATCH 0/7] POWER9 TCG and softfloat enablements - part16 + s390 float fixes David Gibson
2017-02-13 1:43 ` David Gibson
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