From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57037) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cgVMP-0000Rz-Sj for qemu-devel@nongnu.org; Wed, 22 Feb 2017 06:45:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cgVML-0003d2-CD for qemu-devel@nongnu.org; Wed, 22 Feb 2017 06:45:29 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37624 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cgVML-0003cW-6F for qemu-devel@nongnu.org; Wed, 22 Feb 2017 06:45:25 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.20/8.16.0.20) with SMTP id v1MBiH3A079458 for ; Wed, 22 Feb 2017 06:45:24 -0500 Received: from e28smtp03.in.ibm.com (e28smtp03.in.ibm.com [125.16.236.3]) by mx0b-001b2d01.pphosted.com with ESMTP id 28s9r3ruuy-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 22 Feb 2017 06:45:24 -0500 Received: from localhost by e28smtp03.in.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 22 Feb 2017 17:15:20 +0530 From: Nikunj A Dadhania Date: Wed, 22 Feb 2017 17:14:38 +0530 In-Reply-To: <1487763883-4877-1-git-send-email-nikunj@linux.vnet.ibm.com> References: <1487763883-4877-1-git-send-email-nikunj@linux.vnet.ibm.com> Message-Id: <1487763883-4877-6-git-send-email-nikunj@linux.vnet.ibm.com> Subject: [Qemu-devel] [PATCH v3 05/10] target/ppc: update ca32 in arithmetic substract List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com Signed-off-by: Nikunj A Dadhania --- target/ppc/translate.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 9165450..f3f92aa 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -827,7 +827,12 @@ static inline void gen_op_arith_compute_ca32(DisasContext *ctx, } t0 = tcg_temp_new(); - tcg_gen_xor_tl(t0, arg0, arg1); + if (sub) { + tcg_gen_not_tl(t0, arg0); + tcg_gen_xor_tl(t0, t0, arg1); + } else { + tcg_gen_xor_tl(t0, arg0, arg1); + } tcg_gen_xor_tl(t0, t0, res); tcg_gen_extract_tl(cpu_ca32, t0, 32, 1); tcg_temp_free(t0); @@ -1378,17 +1383,22 @@ static inline void gen_op_arith_subf(DisasContext *ctx, TCGv ret, TCGv arg1, tcg_temp_free(t1); tcg_gen_shri_tl(cpu_ca, cpu_ca, 32); /* extract bit 32 */ tcg_gen_andi_tl(cpu_ca, cpu_ca, 1); + if (is_isa300(ctx)) { + tcg_gen_mov_tl(cpu_ca32, cpu_ca); + } } else if (add_ca) { TCGv zero, inv1 = tcg_temp_new(); tcg_gen_not_tl(inv1, arg1); zero = tcg_const_tl(0); tcg_gen_add2_tl(t0, cpu_ca, arg2, zero, cpu_ca, zero); tcg_gen_add2_tl(t0, cpu_ca, t0, cpu_ca, inv1, zero); + gen_op_arith_compute_ca32(ctx, t0, inv1, arg2, 0); tcg_temp_free(zero); tcg_temp_free(inv1); } else { tcg_gen_setcond_tl(TCG_COND_GEU, cpu_ca, arg2, arg1); tcg_gen_sub_tl(t0, arg2, arg1); + gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, 1); } } else if (add_ca) { /* Since we're ignoring carry-out, we can simplify the -- 2.7.4