qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v4 00/15] POWER9 TCG enablements - part15
Date: Fri, 24 Feb 2017 01:26:25 +0530	[thread overview]
Message-ID: <1487879800-12352-1-git-send-email-nikunj@linux.vnet.ibm.com> (raw)

Patches:
01-06  Cleans up the XER split out variables and now the 
       flag bits are stored in XER at their respective places 

07-14  Contains implentation of CA32 and OV32 bits added to the 
       ISA 3.0. Various fixed-point arithmetic instructions are 
       updated to take care of the newer flags.
 
15     Finally the last patch adds new instruction mcrxrx, that helps
       reading the carry (CA and CA32) and the overflow (OV and OV32) flags


Booted the POWER8 guest fine, needs more testing as changes are 
intrusive in nature.

Changelog:
v3:
* Get rid of cpu_ca, cpu_ov, cpu_so split out variables
* As most of the patches under went changes, dropped the 
  reviewed-bys(except neg[.] patch)

v2: 
* Add missing condition in narrow mode(add/subf), multiply and divide
* Drop nego patch, subf implementation is sufficient for setting OV and OV32
* Retaining neg[.], as the code is simplified.
* Fix OV resetting in compute_ov()

v1: 
* Use these ISA 3.0 flag to enable CA32 and OV32
* Re-write ca32 compute routine
* Add setting of flags for "neg." and "nego."

Nikunj A Dadhania (15):
  target/ppc: introduce helper_update_ov_legacy
  target/ppc: update ov flag from remaining paths
  target/ppc: introduce helper_update_ca_legacy
  target/ppc: add gen_op_update_ca_legacy() helper
  target/ppc: add gen_op_update_ov_legacy() helper
  target/ppc: remove xer split-out flags(so, ov, ca)
  target/ppc: support for 32-bit carry and overflow
  target/ppc: update ca32 in arithmetic add
  target/ppc: update ca32 in arithmetic substract
  target/ppc: add gen_op_update_ov_isa300()
  target/ppc: update OV/OV32 for mull[d,w] insns
  target/ppc: update OV/OV32 for divide operations
  target/ppc: update OV/OV32 flags for add/sub
  target/ppc: use tcg ops for neg instruction
  target/ppc: add mcrxrx instruction

 target/ppc/cpu.c        |   8 +-
 target/ppc/cpu.h        |  33 ++--
 target/ppc/int_helper.c |  90 ++++++-----
 target/ppc/translate.c  | 396 +++++++++++++++++++++++++++++++++++-------------
 4 files changed, 371 insertions(+), 156 deletions(-)

-- 
2.7.4

             reply	other threads:[~2017-02-23 19:57 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-23 19:56 Nikunj A Dadhania [this message]
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 01/15] target/ppc: introduce helper_update_ov_legacy Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 02/15] target/ppc: update ov flag from remaining paths Nikunj A Dadhania
2017-02-23 20:23   ` Richard Henderson
2017-02-24  0:45     ` Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 03/15] target/ppc: introduce helper_update_ca_legacy Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 04/15] target/ppc: add gen_op_update_ca_legacy() helper Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 05/15] target/ppc: add gen_op_update_ov_legacy() helper Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca) Nikunj A Dadhania
2017-02-23 20:26   ` Richard Henderson
2017-02-24  0:48     ` Nikunj A Dadhania
2017-02-24  2:58       ` David Gibson
2017-02-24  6:41         ` Richard Henderson
2017-02-24  7:05           ` Nikunj A Dadhania
2017-02-24  7:12             ` [Qemu-devel] [Qemu-ppc] " Nikunj A Dadhania
2017-02-25  2:03             ` [Qemu-devel] " Richard Henderson
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 07/15] target/ppc: support for 32-bit carry and overflow Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 08/15] target/ppc: update ca32 in arithmetic add Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 09/15] target/ppc: update ca32 in arithmetic substract Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 10/15] target/ppc: add gen_op_update_ov_isa300() Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 11/15] target/ppc: update OV/OV32 for mull[d, w] insns Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 12/15] target/ppc: update OV/OV32 for divide operations Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 13/15] target/ppc: update OV/OV32 flags for add/sub Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 14/15] target/ppc: use tcg ops for neg instruction Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 15/15] target/ppc: add mcrxrx instruction Nikunj A Dadhania
2017-02-24  5:02 ` [Qemu-devel] [PATCH v4 00/15] POWER9 TCG enablements - part15 David Gibson
2017-02-24  5:53   ` Nikunj A Dadhania

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1487879800-12352-1-git-send-email-nikunj@linux.vnet.ibm.com \
    --to=nikunj@linux.vnet.ibm.com \
    --cc=bharata@linux.vnet.ibm.com \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).