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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v4 11/15] target/ppc: update OV/OV32 for mull[d, w] insns
Date: Fri, 24 Feb 2017 01:26:36 +0530	[thread overview]
Message-ID: <1487879800-12352-12-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1487879800-12352-1-git-send-email-nikunj@linux.vnet.ibm.com>

For Multiply Word:
SO, OV, and OV32 bits reflects overflow of the 32-bit result

For Multiply DoubleWord:
SO, OV, and OV32 bits reflects overflow of the 64-bit result

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target/ppc/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ea0a356..e1105e8 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1365,7 +1365,7 @@ static void gen_mullwo(DisasContext *ctx)
     tcg_gen_sari_i32(t0, t0, 31);
     tcg_gen_setcond_i32(TCG_COND_NE, t0, t0, t1);
     tcg_gen_extu_i32_tl(ov, t0);
-    gen_op_update_ov_legacy(ov);
+    gen_op_update_ov(ctx, ov, ov);
     tcg_temp_free(ov);
 
     tcg_temp_free_i32(t0);
@@ -1428,7 +1428,7 @@ static void gen_mulldo(DisasContext *ctx)
 
     tcg_gen_sari_i64(t0, t0, 63);
     tcg_gen_setcond_i64(TCG_COND_NE, ov, t0, t1);
-    gen_op_update_ov_legacy(ov);
+    gen_op_update_ov(ctx, ov, ov);
     tcg_temp_free(ov);
 
     tcg_temp_free_i64(t0);
-- 
2.7.4

  parent reply	other threads:[~2017-02-23 19:57 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-23 19:56 [Qemu-devel] [PATCH v4 00/15] POWER9 TCG enablements - part15 Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 01/15] target/ppc: introduce helper_update_ov_legacy Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 02/15] target/ppc: update ov flag from remaining paths Nikunj A Dadhania
2017-02-23 20:23   ` Richard Henderson
2017-02-24  0:45     ` Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 03/15] target/ppc: introduce helper_update_ca_legacy Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 04/15] target/ppc: add gen_op_update_ca_legacy() helper Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 05/15] target/ppc: add gen_op_update_ov_legacy() helper Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 06/15] target/ppc: remove xer split-out flags(so, ov, ca) Nikunj A Dadhania
2017-02-23 20:26   ` Richard Henderson
2017-02-24  0:48     ` Nikunj A Dadhania
2017-02-24  2:58       ` David Gibson
2017-02-24  6:41         ` Richard Henderson
2017-02-24  7:05           ` Nikunj A Dadhania
2017-02-24  7:12             ` [Qemu-devel] [Qemu-ppc] " Nikunj A Dadhania
2017-02-25  2:03             ` [Qemu-devel] " Richard Henderson
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 07/15] target/ppc: support for 32-bit carry and overflow Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 08/15] target/ppc: update ca32 in arithmetic add Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 09/15] target/ppc: update ca32 in arithmetic substract Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 10/15] target/ppc: add gen_op_update_ov_isa300() Nikunj A Dadhania
2017-02-23 19:56 ` Nikunj A Dadhania [this message]
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 12/15] target/ppc: update OV/OV32 for divide operations Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 13/15] target/ppc: update OV/OV32 flags for add/sub Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 14/15] target/ppc: use tcg ops for neg instruction Nikunj A Dadhania
2017-02-23 19:56 ` [Qemu-devel] [PATCH v4 15/15] target/ppc: add mcrxrx instruction Nikunj A Dadhania
2017-02-24  5:02 ` [Qemu-devel] [PATCH v4 00/15] POWER9 TCG enablements - part15 David Gibson
2017-02-24  5:53   ` Nikunj A Dadhania

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