qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH v6 2/8] target/ppc: update ca32 in arithmetic add
Date: Mon, 27 Feb 2017 10:27:55 +0530	[thread overview]
Message-ID: <1488171481-21699-3-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1488171481-21699-1-git-send-email-nikunj@linux.vnet.ibm.com>

Adds routine to compute ca32 - gen_op_arith_compute_ca32

For 64-bit mode use the compute ca32 routine. While for 32-bit mode, CA
and CA32 will have same value.

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target/ppc/translate.c | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index be7378b..eba83ef 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -816,6 +816,23 @@ static inline void gen_op_arith_compute_ov(DisasContext *ctx, TCGv arg0,
     tcg_gen_or_tl(cpu_so, cpu_so, cpu_ov);
 }
 
+static inline void gen_op_arith_compute_ca32(DisasContext *ctx,
+                                             TCGv res, TCGv arg0, TCGv arg1,
+                                             int sub)
+{
+    TCGv t0;
+
+    if (!is_isa300(ctx)) {
+        return;
+    }
+
+    t0 = tcg_temp_new();
+    tcg_gen_xor_tl(t0, arg0, arg1);
+    tcg_gen_xor_tl(t0, t0, res);
+    tcg_gen_extract_tl(cpu_ca32, t0, 32, 1);
+    tcg_temp_free(t0);
+}
+
 /* Common add function */
 static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
                                     TCGv arg2, bool add_ca, bool compute_ca,
@@ -842,6 +859,9 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
             tcg_temp_free(t1);
             tcg_gen_shri_tl(cpu_ca, cpu_ca, 32);   /* extract bit 32 */
             tcg_gen_andi_tl(cpu_ca, cpu_ca, 1);
+            if (is_isa300(ctx)) {
+                tcg_gen_mov_tl(cpu_ca32, cpu_ca);
+            }
         } else {
             TCGv zero = tcg_const_tl(0);
             if (add_ca) {
@@ -850,6 +870,7 @@ static inline void gen_op_arith_add(DisasContext *ctx, TCGv ret, TCGv arg1,
             } else {
                 tcg_gen_add2_tl(t0, cpu_ca, arg1, zero, arg2, zero);
             }
+            gen_op_arith_compute_ca32(ctx, t0, arg1, arg2, 0);
             tcg_temp_free(zero);
         }
     } else {
-- 
2.7.4

  parent reply	other threads:[~2017-02-27  4:58 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-27  4:57 [Qemu-devel] [PATCH v6 0/8] POWER9 TCG enablements - part15 Nikunj A Dadhania
2017-02-27  4:57 ` [Qemu-devel] [PATCH v6 1/8] target/ppc: support for 32-bit carry and overflow Nikunj A Dadhania
2017-02-27  4:57 ` Nikunj A Dadhania [this message]
2017-02-27  4:57 ` [Qemu-devel] [PATCH v6 3/8] target/ppc: update ca32 in arithmetic substract Nikunj A Dadhania
2017-02-27  4:57 ` [Qemu-devel] [PATCH v6 4/8] target/ppc: update overflow flags for add/sub Nikunj A Dadhania
2017-02-27  4:57 ` [Qemu-devel] [PATCH v6 5/8] target/ppc: use tcg ops for neg instruction Nikunj A Dadhania
2017-02-27  4:57 ` [Qemu-devel] [PATCH v6 6/8] target/ppc: add ov32 flag for multiply low insns Nikunj A Dadhania
2017-02-27  4:58 ` [Qemu-devel] [PATCH v6 7/8] target/ppc: add ov32 flag in divide operations Nikunj A Dadhania
2017-02-27  4:58 ` [Qemu-devel] [PATCH v6 8/8] target/ppc: add mcrxrx instruction Nikunj A Dadhania
2017-02-27 23:21 ` [Qemu-devel] [PATCH v6 0/8] POWER9 TCG enablements - part15 David Gibson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1488171481-21699-3-git-send-email-nikunj@linux.vnet.ibm.com \
    --to=nikunj@linux.vnet.ibm.com \
    --cc=bharata@linux.vnet.ibm.com \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=rth@twiddle.net \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).