From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 09/30] cputlb: Don't assume do_unassigned_access() never returns
Date: Mon, 27 Feb 2017 18:04:38 +0000 [thread overview]
Message-ID: <1488218699-31035-10-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1488218699-31035-1-git-send-email-peter.maydell@linaro.org>
In get_page_addr_code(), if the guest PC doesn't correspond to RAM
then we currently run the CPU's do_unassigned_access() hook if it has
one, and otherwise we give up and exit QEMU with a more-or-less
useful message. This code assumes that the do_unassigned_access hook
will never return, because if it does then we'll plough on attempting
to use a non-RAM TLB entry to get a RAM address and will abort() in
qemu_ram_addr_from_host_nofail(). Unfortunately some CPU
implementations of this hook do return: Microblaze, SPARC and the ARM
v7M.
Change the code to call report_bad_exec() if the hook returns, as
well as if it didn't have one. This means we can tidy it up to use
the cpu_unassigned_access() function which wraps the "get the CPU
class and call the hook if it has one" work, since we aren't trying
to distinguish "no hook" from "hook existed and returned" any more.
This brings the handling of this hook into line with the handling
used for data accesses, where "hook returned" is treated the
same as "no hook existed" and gets you the default behaviour.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
cputlb.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index 7fa7fef..f5d056c 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -769,14 +769,13 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
pd = iotlbentry->addr & ~TARGET_PAGE_MASK;
mr = iotlb_to_region(cpu, pd, iotlbentry->attrs);
if (memory_region_is_unassigned(mr)) {
- CPUClass *cc = CPU_GET_CLASS(cpu);
-
- if (cc->do_unassigned_access) {
- cc->do_unassigned_access(cpu, addr, false, true, 0, 4);
- } else {
- report_bad_exec(cpu, addr);
- exit(1);
- }
+ cpu_unassigned_access(cpu, addr, false, true, 0, 4);
+ /* The CPU's unassigned access hook might have longjumped out
+ * with an exception. If it didn't (or there was no hook) then
+ * we can't proceed further.
+ */
+ report_bad_exec(cpu, addr);
+ exit(1);
}
p = (void *)((uintptr_t)addr + env1->tlb_table[mmu_idx][page_index].addend);
return qemu_ram_addr_from_host_nofail(p);
--
2.7.4
next prev parent reply other threads:[~2017-02-27 18:05 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-27 18:04 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 01/30] target-arm: Implement BCM2835 hardware RNG Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 02/30] bcm2835_rng: Use qcrypto_random_bytes() rather than rand() Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 03/30] sd: sdhci: mask transfer mode register value Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 04/30] sd: sdhci: check transfer mode register in multi block transfer Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 05/30] sd: sdhci: conditionally invoke " Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in single block transfers Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 08/30] Add missing fp_access_check() to aarch64 crypto instructions Peter Maydell
2017-02-27 18:04 ` Peter Maydell [this message]
2017-02-27 18:04 ` [Qemu-devel] [PULL 10/30] hw/arm/virt: Add a user option to disallow ITS instantiation Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 11/30] ARM i.MX timers: fix reset handling Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 12/30] armv7m: Rename nvic_state to NVICState Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 13/30] armv7m: Implement reading and writing of PRIGROUP Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 14/30] armv7m: Rewrite NVIC to not use any GIC code Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 15/30] armv7m: Fix condition check for taking exceptions Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 16/30] arm: gic: Remove references to NVIC Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 17/30] armv7m: Escalate exceptions to HardFault if necessary Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 18/30] armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 19/30] armv7m: Simpler and faster exception start Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 20/30] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 21/30] armv7m: Extract "exception taken" code into functions Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 22/30] armv7m: Check exception return consistency Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 23/30] armv7m: Raise correct kind of UsageFault for attempts to execute ARM code Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 24/30] armv7m: Allow SHCSR writes to change pending and active bits Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 25/30] bcm2835_sdhost: add bcm2835 sdhost controller Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 26/30] hw/sd: add card-reparenting function Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 27/30] bcm2835_gpio: add bcm2835 gpio controller Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 28/30] bcm2835: add sdhost and gpio controllers Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 29/30] hw/arm/exynos: Fix Linux kernel division by zero for PLLs Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 30/30] hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID Peter Maydell
2017-02-27 19:14 ` [Qemu-devel] [PULL 00/30] target-arm queue no-reply
2017-02-28 12:07 ` Peter Maydell
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