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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 13/30] armv7m: Implement reading and writing of PRIGROUP
Date: Mon, 27 Feb 2017 18:04:42 +0000	[thread overview]
Message-ID: <1488218699-31035-14-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1488218699-31035-1-git-send-email-peter.maydell@linaro.org>

Add a state field for the v7M PRIGROUP register and implent
reading and writing it. The current NVIC doesn't honour
the values written, but the new version will.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
---
 hw/intc/armv7m_nvic.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 09975f3..ce22001 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -24,6 +24,9 @@
 typedef struct NVICState {
     GICState gic;
     ARMCPU *cpu;
+
+    uint32_t prigroup;
+
     struct {
         uint32_t control;
         uint32_t reload;
@@ -223,7 +226,7 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset)
     case 0xd08: /* Vector Table Offset.  */
         return cpu->env.v7m.vecbase;
     case 0xd0c: /* Application Interrupt/Reset Control.  */
-        return 0xfa050000;
+        return 0xfa050000 | (s->prigroup << 8);
     case 0xd10: /* System Control.  */
         /* TODO: Implement SLEEPONEXIT.  */
         return 0;
@@ -362,9 +365,7 @@ static void nvic_writel(NVICState *s, uint32_t offset, uint32_t value)
             if (value & 1) {
                 qemu_log_mask(LOG_UNIMP, "AIRCR system reset unimplemented\n");
             }
-            if (value & 0x700) {
-                qemu_log_mask(LOG_UNIMP, "PRIGROUP unimplemented\n");
-            }
+            s->prigroup = extract32(value, 8, 3);
         }
         break;
     case 0xd10: /* System Control.  */
@@ -483,13 +484,14 @@ static const MemoryRegionOps nvic_sysreg_ops = {
 
 static const VMStateDescription vmstate_nvic = {
     .name = "armv7m_nvic",
-    .version_id = 1,
-    .minimum_version_id = 1,
+    .version_id = 2,
+    .minimum_version_id = 2,
     .fields = (VMStateField[]) {
         VMSTATE_UINT32(systick.control, NVICState),
         VMSTATE_UINT32(systick.reload, NVICState),
         VMSTATE_INT64(systick.tick, NVICState),
         VMSTATE_TIMER_PTR(systick.timer, NVICState),
+        VMSTATE_UINT32(prigroup, NVICState),
         VMSTATE_END_OF_LIST()
     }
 };
-- 
2.7.4

  parent reply	other threads:[~2017-02-27 18:05 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-27 18:04 [Qemu-devel] [PULL 00/30] target-arm queue Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 01/30] target-arm: Implement BCM2835 hardware RNG Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 02/30] bcm2835_rng: Use qcrypto_random_bytes() rather than rand() Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 03/30] sd: sdhci: mask transfer mode register value Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 04/30] sd: sdhci: check transfer mode register in multi block transfer Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 05/30] sd: sdhci: conditionally invoke " Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 06/30] sd: sdhci: Remove block count enable check in single block transfers Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 07/30] hw/arm/virt: fix cpu object reference leak Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 08/30] Add missing fp_access_check() to aarch64 crypto instructions Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 09/30] cputlb: Don't assume do_unassigned_access() never returns Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 10/30] hw/arm/virt: Add a user option to disallow ITS instantiation Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 11/30] ARM i.MX timers: fix reset handling Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 12/30] armv7m: Rename nvic_state to NVICState Peter Maydell
2017-02-27 18:04 ` Peter Maydell [this message]
2017-02-27 18:04 ` [Qemu-devel] [PULL 14/30] armv7m: Rewrite NVIC to not use any GIC code Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 15/30] armv7m: Fix condition check for taking exceptions Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 16/30] arm: gic: Remove references to NVIC Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 17/30] armv7m: Escalate exceptions to HardFault if necessary Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 18/30] armv7m: Remove unused armv7m_nvic_acknowledge_irq() return value Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 19/30] armv7m: Simpler and faster exception start Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 20/30] armv7m: VECTCLRACTIVE and VECTRESET are UNPREDICTABLE Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 21/30] armv7m: Extract "exception taken" code into functions Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 22/30] armv7m: Check exception return consistency Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 23/30] armv7m: Raise correct kind of UsageFault for attempts to execute ARM code Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 24/30] armv7m: Allow SHCSR writes to change pending and active bits Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 25/30] bcm2835_sdhost: add bcm2835 sdhost controller Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 26/30] hw/sd: add card-reparenting function Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 27/30] bcm2835_gpio: add bcm2835 gpio controller Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 28/30] bcm2835: add sdhost and gpio controllers Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 29/30] hw/arm/exynos: Fix Linux kernel division by zero for PLLs Peter Maydell
2017-02-27 18:04 ` [Qemu-devel] [PULL 30/30] hw/arm/exynos: Fix proper mapping of CPUs by providing real cluster ID Peter Maydell
2017-02-27 19:14 ` [Qemu-devel] [PULL 00/30] target-arm queue no-reply
2017-02-28 12:07 ` Peter Maydell

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