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From: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, rth@twiddle.net
Cc: qemu-devel@nongnu.org, bharata@linux.vnet.ibm.com,
	nikunj@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH 2/3] target/ppc: fmadd: add macro for updating flags
Date: Fri,  3 Mar 2017 12:28:08 +0530	[thread overview]
Message-ID: <1488524289-5305-3-git-send-email-nikunj@linux.vnet.ibm.com> (raw)
In-Reply-To: <1488524289-5305-1-git-send-email-nikunj@linux.vnet.ibm.com>

Adds FPU_MADDSUB_UPDATE macro, this will be used for other routines
having float32/16

Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
---
 target/ppc/fpu_helper.c | 62 ++++++++++++++++++++++++-------------------------
 1 file changed, 31 insertions(+), 31 deletions(-)

diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index a547f58..56dfa18 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -743,38 +743,38 @@ uint64_t helper_frim(CPUPPCState *env, uint64_t arg)
     return do_fri(env, arg, float_round_down);
 }
 
-static void float64_maddsub_update_excp(CPUPPCState *env, float64 arg1,
-                                        float64 arg2, float64 arg3,
-                                        unsigned int madd_flags)
-{
-    if (unlikely(float64_is_signaling_nan(arg1, &env->fp_status) ||
-                 float64_is_signaling_nan(arg2, &env->fp_status) ||
-                 float64_is_signaling_nan(arg3, &env->fp_status))) {
-        /* sNaN operation */
-        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);
-    }
-
-    if (unlikely((float64_is_infinity(arg1) && float64_is_zero(arg2)) ||
-                 (float64_is_zero(arg1) && float64_is_infinity(arg2)))) {
-        /* Multiplication of zero by infinity */
-        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);
-    }
-
-    if ((float64_is_infinity(arg1) || float64_is_infinity(arg2)) &&
-        float64_is_infinity(arg3)) {
-        uint8_t aSign, bSign, cSign;
-
-        aSign = float64_is_neg(arg1);
-        bSign = float64_is_neg(arg2);
-        cSign = float64_is_neg(arg3);
-        if (madd_flags & float_muladd_negate_c) {
-            cSign ^= 1;
-        }
-        if (aSign ^ bSign ^ cSign) {
-            float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1);
-        }
-    }
+#define FPU_MADDSUB_UPDATE(name, tp)                                    \
+static void name(CPUPPCState *env, float64 arg1,                        \
+                 float64 arg2, float64 arg3,                            \
+                 unsigned int madd_flags)                               \
+{                                                                       \
+    if (tp##_is_signaling_nan(arg1, &env->fp_status) ||                 \
+        tp##_is_signaling_nan(arg2, &env->fp_status) ||                 \
+        tp##_is_signaling_nan(arg3, &env->fp_status)) {                 \
+        /* sNaN operation */                                            \
+        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXSNAN, 1);          \
+    }                                                                   \
+    if ((tp##_is_infinity(arg1) && tp##_is_zero(arg2)) ||               \
+        (tp##_is_zero(arg1) && tp##_is_infinity(arg2))) {               \
+        /* Multiplication of zero by infinity */                        \
+        float_invalid_op_excp(env, POWERPC_EXCP_FP_VXIMZ, 1);           \
+    }                                                                   \
+    if ((tp##_is_infinity(arg1) || tp##_is_infinity(arg2)) &&           \
+        tp##_is_infinity(arg3)) {                                       \
+        uint8_t aSign, bSign, cSign;                                    \
+                                                                        \
+        aSign = tp##_is_neg(arg1);                                      \
+        bSign = tp##_is_neg(arg2);                                      \
+        cSign = tp##_is_neg(arg3);                                      \
+        if (madd_flags & float_muladd_negate_c) {                       \
+            cSign ^= 1;                                                 \
+        }                                                               \
+        if (aSign ^ bSign ^ cSign) {                                    \
+            float_invalid_op_excp(env, POWERPC_EXCP_FP_VXISI, 1);       \
+        }                                                               \
+    }                                                                   \
 }
+FPU_MADDSUB_UPDATE(float64_maddsub_update_excp, float64)
 
 #define FPU_FMADD(op, madd_flags)                                       \
 uint64_t helper_##op(CPUPPCState *env, uint64_t arg1,                   \
-- 
2.7.4

  parent reply	other threads:[~2017-03-03  6:58 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-03  6:58 [Qemu-devel] [PATCH 0/3] target/ppc: floating point multiply-add fixes Nikunj A Dadhania
2017-03-03  6:58 ` [Qemu-devel] [PATCH 1/3] target/ppc: fmadd check for excp independently Nikunj A Dadhania
2017-03-03 19:14   ` Richard Henderson
2017-03-03  6:58 ` Nikunj A Dadhania [this message]
2017-03-03 19:15   ` [Qemu-devel] [PATCH 2/3] target/ppc: fmadd: add macro for updating flags Richard Henderson
2017-03-04 13:42     ` [Qemu-devel] [Qemu-ppc] " Nikunj Dadhania
2017-03-03  6:58 ` [Qemu-devel] [PATCH 3/3] target/ppc: use helper for excp handling Nikunj A Dadhania

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