From: Thomas Huth <thuth@redhat.com>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Cc: Alexander Graf <agraf@suse.de>
Subject: [Qemu-devel] [PATCH] target/ppc: Fix wrong number of UAMR register
Date: Wed, 8 Mar 2017 20:58:43 +0100 [thread overview]
Message-ID: <1489003123-3641-1-git-send-email-thuth@redhat.com> (raw)
The SPR UAMR has the number 13, and not 12. (Fortunately it seems like
Linux is not using this register yet - only the privileged version with
number 29 ... that's why nobody noticed this problem yet)
Signed-off-by: Thomas Huth <thuth@redhat.com>
---
target/ppc/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 7c4a1f5..5ee33b3 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1408,7 +1408,7 @@ int ppc_compat_max_threads(PowerPCCPU *cpu);
#define SPR_601_UDECR (0x006)
#define SPR_LR (0x008)
#define SPR_CTR (0x009)
-#define SPR_UAMR (0x00C)
+#define SPR_UAMR (0x00D)
#define SPR_DSCR (0x011)
#define SPR_DSISR (0x012)
#define SPR_DAR (0x013) /* DAE for PowerPC 601 */
--
1.8.3.1
next reply other threads:[~2017-03-08 19:58 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 19:58 Thomas Huth [this message]
2017-03-09 1:34 ` [Qemu-devel] [PATCH] target/ppc: Fix wrong number of UAMR register David Gibson
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