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From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [Qemu-devel] [PATCH v3 2/8] spapr: move the IRQ server number mapping under the machine
Date: Tue, 28 Mar 2017 09:32:26 +0200	[thread overview]
Message-ID: <1490686352-24017-3-git-send-email-clg@kaod.org> (raw)
In-Reply-To: <1490686352-24017-1-git-send-email-clg@kaod.org>

This is the second step to abstract the IRQ 'server' number of the
XICS layer. Now that the prereq cleanups have been done in the
previous patch, we can move down the 'cpu_dt_id' to 'cpu_index'
mapping in the sPAPR machine handler.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/intc/xics_spapr.c    | 5 ++---
 hw/ppc/spapr.c          | 3 ++-
 hw/ppc/spapr_cpu_core.c | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c
index 6144f9876ae3..5d685769ad0c 100644
--- a/hw/intc/xics_spapr.c
+++ b/hw/intc/xics_spapr.c
@@ -52,9 +52,8 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineState *spapr,
 static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
                           target_ulong opcode, target_ulong *args)
 {
-    target_ulong server = xics_get_cpu_index_by_dt_id(args[0]);
     target_ulong mfrr = args[1];
-    ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), server);
+    ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]);
 
     if (!icp) {
         return H_PARAMETER;
@@ -122,7 +121,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachineState *spapr,
     }
 
     nr = rtas_ld(args, 0);
-    server = xics_get_cpu_index_by_dt_id(rtas_ld(args, 1));
+    server = rtas_ld(args, 1);
     priority = rtas_ld(args, 2);
 
     if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), server)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 8aecea3dd10c..b9f7f8607869 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -3024,9 +3024,10 @@ static void spapr_ics_resend(XICSFabric *dev)
     ics_resend(spapr->ics);
 }
 
-static ICPState *spapr_icp_get(XICSFabric *xi, int server)
+static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id)
 {
     sPAPRMachineState *spapr = SPAPR_MACHINE(xi);
+    int server = xics_get_cpu_index_by_dt_id(cpu_dt_id);
 
     return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL;
 }
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index f9ca3f09a0f8..4bd7449a7c88 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -64,7 +64,7 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu,
 {
     CPUPPCState *env = &cpu->env;
     XICSFabric *xi = XICS_FABRIC(spapr);
-    ICPState *icp = xics_icp_get(xi, CPU(cpu)->cpu_index);
+    ICPState *icp = xics_icp_get(xi, cpu->cpu_dt_id);
 
     /* Set time-base frequency to 512 MHz */
     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
-- 
2.7.4

  parent reply	other threads:[~2017-03-28  7:33 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-28  7:32 [Qemu-devel] [PATCH v3 0/8] ppc/pnv: interrupt controller (POWER8) Cédric Le Goater
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 1/8] ppc/xics: introduce an 'icp' backlink under PowerPCCPU Cédric Le Goater
2017-03-29  4:11   ` David Gibson
2017-03-29  7:14     ` Cédric Le Goater
2017-03-30  1:26       ` David Gibson
2017-03-28  7:32 ` Cédric Le Goater [this message]
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 3/8] ppc/xics: add a realize() handler to ICPStateClass Cédric Le Goater
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 4/8] ppc/pnv: add a PnvICPState object Cédric Le Goater
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 5/8] ppc/pnv: create the ICP and ICS objects under the machine Cédric Le Goater
2017-03-29  5:18   ` David Gibson
2017-03-29  8:13     ` Cédric Le Goater
2017-03-30  1:55       ` David Gibson
2017-03-30  8:15         ` Cédric Le Goater
2017-04-02  6:11           ` David Gibson
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 6/8] ppc/pnv: add a helper to calculate MMIO addresses registers Cédric Le Goater
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 7/8] ppc/pnv: link the CPUs to the machine XICSFabric Cédric Le Goater
2017-03-29  5:20   ` David Gibson
2017-03-29  7:16     ` Cédric Le Goater
2017-03-28  7:32 ` [Qemu-devel] [PATCH v3 8/8] ppc/pnv: add memory regions for the ICP registers Cédric Le Goater

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