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From: Sandipan Das <sandipandas1990@gmail.com>
To: nikunj@linux.vnet.ibm.com
Cc: qemu-devel@nongnu.org, peter.maydell@linaro.org,
	joserz@linux.vnet.ibm.com
Subject: [Qemu-devel] [PATCH risu v2] ppc64: Fix patterns for rotate doubleword instructions
Date: Mon, 22 May 2017 14:47:59 +0530	[thread overview]
Message-ID: <1495444679-7736-1-git-send-email-sandipandas1990@gmail.com> (raw)

The patterns for the following instructions are fixed:
 * Rotate Left Doubleword then Clear Right (rldcr[.])
 * Rotate Left Doubleword Immediate then Clear Right (rldicr[.])
 * Rotate Left Doubleword Immediate then Mask Insert (rldimi[.])

The first instruction has a typo. For the other two instructions,
the extended opcodes are incorrect and the shift field 'sha' is
absent. Also, the shift field 'sh' should be used in place of the
register field 'rb'.

Signed-off-by: Sandipan Das <sandipandas1990@gmail.com>
---
 ppc64.risu | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/ppc64.risu b/ppc64.risu
index 28df9da..dd304e2 100644
--- a/ppc64.risu
+++ b/ppc64.risu
@@ -1451,7 +1451,7 @@ RLDCLd PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10001 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 
 # format:MDS book:I page:103 PPC SR rldcr Rotate Left Dword then Clear Right
-RLCDR PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10010 \
+RLDCR PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10010 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 # format:MDS book:I page:103 PPC SR rldcr Rotate Left Dword then Clear Right
 RLDCRd PPC64LE 011110 rs:5 ra:5 rb:5 mb:6 10011 \
@@ -1472,17 +1472,17 @@ RLDICLd PPC64LE 011110 rs:5 ra:5 sh:5 mb:6 000 sha:1 1 \
 !constraints { $rs != 1 && $ra != 1 && $rs != 13 && $ra != 13; }
 
 # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
-RLDICR PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00010 \
+RLDICR PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 0 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 # format:MD book:I page:105 PPC SR rldicr[.] Rotate Left Dword Immediate then Clear Right
-RLDICRd PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00011 \
+RLDICRd PPC64LE 011110 rs:5 ra:5 sh:5 me:6 001 sha:1 1 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 
 # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
-RLDIMI PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00110 \
+RLDIMI PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 0 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 # format:MD book:I page:105 PPC SR rldimi[.] Rotate Left Dword Immediate then Mask Insert
-RLDIMId PPC64LE 011110 rs:5 ra:5 rb:5 me:6 00111 \
+RLDIMId PPC64LE 011110 rs:5 ra:5 sh:5 me:6 011 sha:1 1 \
 !constraints { $rs != 1 && $ra != 1 && $rb != 1 && $rs != 13 && $ra != 13 && $rb != 13; }
 
 # format:M book:I page:102 v:P1 SR rlwimi[.] Rotate Left Word Immediate then Mask Insert
-- 
2.7.4

             reply	other threads:[~2017-05-22  9:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-22  9:17 Sandipan Das [this message]
2017-05-30 15:26 ` [Qemu-devel] [PATCH risu v2] ppc64: Fix patterns for rotate doubleword instructions Nikunj A Dadhania
2017-05-30 15:39   ` Peter Maydell
2017-05-30 16:37     ` Peter Maydell
2017-05-31  5:12       ` Nikunj A Dadhania
  -- strict thread matches above, loose matches on Subject: below --
2017-05-30 14:29 Peter Maydell

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