From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 13/27] arm: Remove unnecessary check on cpu->pmsav7_dregion
Date: Thu, 1 Jun 2017 18:10:21 +0100 [thread overview]
Message-ID: <1496337035-30213-14-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1496337035-30213-1-git-send-email-peter.maydell@linaro.org>
Now that we enforce both:
* pmsav7_dregion == 0 implies has_mpu == false
* PMSA with has_mpu == false means SCTLR.M cannot be set
we can remove a check on pmsav7_dregion from get_phys_addr_pmsav7(),
because we can only reach this code path if the MPU is enabled
(and so region_translation_disabled() returned false).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 1493122030-32191-8-git-send-email-peter.maydell@linaro.org
---
target/arm/helper.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index f0f25c8..5c044d0 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8227,8 +8227,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
}
if (n == -1) { /* no hits */
- if (cpu->pmsav7_dregion &&
- (is_user || !(regime_sctlr(env, mmu_idx) & SCTLR_BR))) {
+ if (is_user || !(regime_sctlr(env, mmu_idx) & SCTLR_BR)) {
/* background fault */
*fsr = 0;
return true;
--
2.7.4
next prev parent reply other threads:[~2017-06-01 17:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-01 17:10 [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 01/27] libvixl: Correct build failures on NetBSD Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 02/27] load_uboot_image: don't assume a full header read Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 03/27] hw/intc/arm_gicv3_cpuif: Fix reset value for VMCR_EL2.VBPR1 Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 04/27] hw/intc/arm_gicv3_cpuif: Don't let BPR be set below its minimum Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 05/27] hw/intc/arm_gicv3_cpuif: Fix priority masking for NS BPR1 Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 06/27] target/arm: clear PMUVER field of AA64DFR0 when vPMU=off Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 07/27] arm: Use the mmu_idx we're passed in arm_cpu_do_unaligned_access() Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 08/27] arm: Add support for M profile CPUs having different MMU index semantics Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 09/27] arm: Use different ARMMMUIdx values for M profile Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 10/27] arm: Clean up handling of no-MPU PMSA CPUs Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 11/27] arm: Don't clear ARM_FEATURE_PMSA for no-mpu configs Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 12/27] arm: Don't let no-MPU PMSA cores write to SCTLR.M Peter Maydell
2017-06-01 17:10 ` Peter Maydell [this message]
2017-06-01 17:10 ` [Qemu-devel] [PULL 14/27] armv7m: Improve "-d mmu" tracing for PMSAv7 MPU Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 15/27] armv7m: Implement M profile default memory map Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 16/27] arm: All M profile cores are PMSA Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 17/27] armv7m: Classify faults as MemManage or BusFault Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 18/27] arm: add MPU support to M profile CPUs Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 19/27] arm: Implement HFNMIENA support for M profile MPU Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 20/27] aspeed/i2c: improve command handling Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 21/27] aspeed/i2c: handle LAST command under the RX command Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 22/27] aspeed/i2c: introduce a state machine Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 23/27] aspeed: add some I2C devices to the Aspeed machines Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 24/27] hw/misc: add a TMP42{1, 2, 3} device model Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 25/27] aspeed: add a temp sensor device on I2C bus 3 Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 26/27] hw/arm/virt-acpi-build: build SLIT when needed Peter Maydell
2017-06-01 17:10 ` [Qemu-devel] [PULL 27/27] hw/arm/virt: fdt: generate distance-map " Peter Maydell
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